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Method for supporting multiple processor node internal organ data sharing by directory protocol

A multi-processor, data sharing technology, applied in electrical digital data processing, instruments, memory systems, etc., can solve problems such as consistency protocol failure, owner uncertainty, etc., to reduce communication delay, achieve early use, and achieve organic Fusion effect

Inactive Publication Date: 2007-07-25
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Because if there is an external or internal node to make a read and write request for the block data, the problem of owner uncertainty will occur (because the state of the processor with the latest data of the Cache block is shared, and the processor only has Data can only flow out when it is in a dirty state), resulting in the failure of the consistency protocol in the system
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  • Method for supporting multiple processor node internal organ data sharing by directory protocol
  • Method for supporting multiple processor node internal organ data sharing by directory protocol
  • Method for supporting multiple processor node internal organ data sharing by directory protocol

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Embodiment Construction

[0067] Figure 1 is a schematic diagram of the Origin 2000 architecture of SGI using a single-layer directory protocol. SGI's Origin2000 system consists of multiple processing nodes. These processing nodes are connected together by a switching-based interconnection network to form the entire CC-NUMA system. Each processing node includes a MIPSR10000 processor and a node controller HUB, each processor has a first-level and a second-level Cache, and the HUB includes a memory reset interface, an interconnection network interface and an I / O interface. The HUB hardware implements the Cache coherence protocol to realize distributed shared memory access. It can see that the processor requests in the node miss in all secondary caches, no matter whether they are satisfied locally or remotely; it receives transactions from the network; The local processor Cache gets the data.

[0068] FIG. 2 is a schematic diagram of the SMP-based CC-NUMA architecture in the monitoring-directory two-la...

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Abstract

This invention discloses a support method for catalog protocol's multiprocessing node viscera data sharing, with the purpose of by adopting monitor-catalog protocol way based on SMP' s CC-NUMA system, solving uncertainty of owner problem caused by sharing viscera data to realize beforehand sharing. The technology project is characterized in designing WSRM request producing logic used in monitoring bus in node controller hardware NC logic, when finding viscera hit and READ_SH request type, NC receiving viscera duplicate on bus and generating a WSRM capable of operating catalog block, NC relevant to HOME node processing WSRM request and write the latest duplicate into memory. The invention realizes that latest data unwritten into memory are beforehand shared in several processors and solve the uncertainty of owner problem.

Description

Technical field: [0001] The invention relates to a data sharing method in a CC-NUMA (Cache Coherent-Non Uniform Memory Access distributed shared storage system structure supporting non-uniform storage access of Cache consistency protocol) system, especially a method for supporting multiple CPUs in a node to monitor through a bus Construct the implementation method of data sharing based on directory-based Cache coherence protocol in CC-NUMA system. Background technique: [0002] At present, most of the consistency protocols of the CC-NUMA system based on SMP (Symmetrical Multi-Processing) adopt a single-layer directory protocol, such as Origin 2000 of SGI. This type of protocol generally uses the Communication Assist to search for the corresponding directory item information to perform consistency processing and realize data sharing within the node. Although this implementation method is simple, it seriously sacrifices the potential advantages of data sharing between Cache a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/08H04L29/06G06F12/0806G06F12/0815
Inventor 刘光明庞征斌李永进窦强谢伦国郑义李小芳李楠黄子中
Owner NAT UNIV OF DEFENSE TECH
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