High-voltage linear voltage stabilizer

Abstract

The invention discloses a high-voltage linear voltage stabilizer, which realizes power supply for a low-voltage circuit by adopting a control mode of reducing high voltage into low voltage and combining an NJFET (Non Junction Field Effect Transistor) tube and a high-voltage NMOS (N-channel Metal Oxide Semiconductor) tube, and comprises two circuits for regulating an output voltage VOUT by trimming a reference voltage and regulating the output voltage VOUT by trimming an output feedback resistor. An extra step-down circuit and a starting circuit are not needed, static power consumption of low-power-consumption application can be obviously improved, meanwhile, dynamic compensation is introduced to achieve effective compensation in a full-load range, under the condition that high-voltage performance is guaranteed, the static power consumption can be obviously reduced, the full-load range is kept stable, miniaturization packaging is conveniently achieved, and cost is reduced. Therefore, the optimal combination of performance and cost is realized.

Description

technical field [0001] The invention relates to a power management circuit, in particular to a high-voltage linear regulator, which belongs to the technical field of integrated circuits and electronic circuits. Background technique [0002] As portable electronic products are widely used in all aspects of work and life, higher requirements are placed on the performance of the power supply, especially the miniaturization and low power consumption of the system. The traditional high-voltage linear regulator can provide excellent anti-power interference ability and is widely used in circuit design. Since the architecture must include a high-voltage to low-voltage step-down circuit, a reference circuit and an operational amplifier circuit at the same time, this structure It usually brings other problems, such as high static power consumption and complex circuit, etc. The high static current will limit the service life of the battery and reduce the working time of portable device...

AI Technical Summary

Problems solved by technology

In CN103955251B and CN210983127U patents, the op amp directly uses high-voltage devices without step-down operation, resulting in a very large area of ​​high-voltage devices, and the performance of devices such as transconductance is much lower than that of low-voltage devices

In the patents of CN105955385B, CN103729012B and CN203084588U, since the Zener clamp is used to reduce the voltage and the series resistor is used to limit the current, the overall static power consumption will increase linearly with the increase of VIN. If low power consumption is to be achieved, A very large resistor is required, but it takes up a very large chip area and brings high cost

In the CN203084588U patent, since the combination of high-voltage NJFET and dissipator is not used, the design of low power consumption and exemption from the start-up circuit cannot be realized, and the cost control of the circuit will be more difficult, and because the second stage of the operational amplifier is a follower made of Lv_pmos, There is no gain, so the effect of Miller compensation is very limited, and the compensation in the full load range cannot be realized, which is not conducive to wide load applications

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