Magnetic random access memory array based on 2T-2MTJ storage unit and read-write method thereof

Abstract

The invention discloses a magnetic random access memory array based on a 2T-2MTJ storage unit and a read-write method thereof, and belongs to the field of nonvolatile memorizers, the magnetic random access memory array comprises a storage array, a level conversion circuit, a sensitive amplifier SA, a write circuit and a multilateral selection circuit; the sensitive amplifier SA is connected with the multilateral selection circuit and is used for amplifying and reading out a data signal; the multilateral selection circuit comprises multiplexers MUX1-MUX4 which are used for respectively selecting a bit line BL, a source line SL, a bit line BLN and a source line SLN of a storage unit in the storage array; the level conversion circuit is connected with word lines WL and WLN of the storage array, the voltages of the word lines WL and WLN are switched between VWL0 and VWL1 according to different write-in data DQ, and the VWL0 is smaller than the VWL1; and the write circuit is connected with the multilateral selection circuit and is used for writing data DQ. Word line voltage in the storage array is switched according to different written data, and the problem that the written voltage acting on a magnetic tunnel junction is too small due to threshold loss of an NMOS tube is solved.

Description

Technical field [0001] The present invention relates to a non-volatile memory technology, and particularly relates to a magnetic random access memory array and read-write method based on 2T-2MTJ memory cell. Background technique [0002] The magnetic random access memory is a new type of non-volatile information storage with low power consumption, fast access speed, reliability, and compatible with standard CMOS technology advantages. With the continuous development of semiconductor technology, electronic products constantly updated to a higher performance of the memory requirements, including a higher density, a higher read and write speeds and lower power consumption. [0003] A typical MRAM memory cell having a 1T-1MTJ 2T-2MTJ both units and structures. Wherein the 2T-2MTJ memory cell structure, using a reference from the form, the two units are always in opposite magnetic tunnel junction memory states using the read reliability of the memory cell structure will increase. Writ...

AI Technical Summary

Problems solved by technology

The magnetic tunnel junction is connected to the NMOS transistor, and the NMOS transistor is located under the magnetic tunnel junction. When writing data "1", due to the threshold loss effect of the NMOS transistor, the voltage value dropped on the magnetic tunnel junction is relatively small, which may not reach to the critical switching voltage value of the magnetic tunnel junction

One of the methods to solve the above problems is to increase the voltage value on WL during the writing process, but too large WL voltage value has the risk of breaking down the gate oxide layer of the NMOS transistor

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