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Programming and read bias and access scheme to improve data throughput of 2-stack 3D PCM memories

A memory and bias technology, applied in static memory, read-only memory, digital memory information, etc., can solve the problems of high cost, difficult plane processing and manufacturing technology, etc.

Active Publication Date: 2021-03-09
YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as memory cell feature sizes approach lower limits, planar processing and fabrication techniques become more difficult and costly
Thus, the storage density of planar memory cells approaches the upper limit

Method used

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  • Programming and read bias and access scheme to improve data throughput of 2-stack 3D PCM memories
  • Programming and read bias and access scheme to improve data throughput of 2-stack 3D PCM memories
  • Programming and read bias and access scheme to improve data throughput of 2-stack 3D PCM memories

Examples

Experimental program
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Embodiment Construction

[0037] The presented technique is applied in the field of three-dimensional memory. figure 1 A generalized example of a three-dimensional (3D) memory is shown. in particular, figure 1 is an isometric view of a segment of a 3D intersection memory. The memory includes a first layer storage unit 5 and a second layer storage unit 10 . Between the memory cells of the first level 5 and the memory cells of the second level are a certain number of word lines 15 extending in the horizontal or X direction. Above the first layer of memory cells 5 is a certain number of first bit lines 20 extending in the vertical or Y direction, and below the second layer of memory cells is a certain number of second bit lines 25 extending in the Y direction.

[0038] In addition, if figure 1 As shown in , the sequential structure of bit line, memory cell, word line, memory cell can be repeated along the Z direction to create a stacked configuration. exist figure 1 In an example, the first layer of...

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PUM

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Abstract

Disclosed is a method for accessing a memory cell of a three-dimensional memory, the three-dimensional memory including a plurality of bottom cell blocks, a plurality of top cell blocks, a plurality of bottom cell bit lines coupled to the bottom cell blocks, a plurality of top cell bit lines coupled to the top cell blocks, and a plurality of word lines, wherein the plurality of word lines are coupled to each of the bottom cell blocks below the word lines and the top cell blocks above the word lines. The method includes accessing a memory cell of the bottom cell blocks and a memory cell of thetop cell blocks at a time by biasing one word line, one bit line of a bottom cell bit line, and one bit line of a top cell bit line.

Description

technical field [0001] Generally, the present disclosure relates to three-dimensional electronic memory, and more particularly, to improving the throughput of memory cell access schemes in three-dimensional cross-point memory. Background technique [0002] Planar memory cells have been shrunk to smaller sizes by improving process technology, circuit design, programming algorithms, and fabrication techniques. However, as the feature size of memory cells approaches the lower limit, planar processing and fabrication techniques become more difficult and costly. Thus, the storage density of planar memory cells approaches the upper limit. A three-dimensional (3D) memory architecture can address density limitations in planar memory cells, and a biasing scheme for accessing memory cells of the three-dimensional (3D) memory architecture can address throughput limitations of the three-dimensional (3D) memory architecture. Contents of the invention [0003] The disclosed three-dime...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/08G11C16/24G11C16/26
CPCG11C16/08G11C16/24G11C16/26G11C11/5678G11C13/003G11C13/0026G11C13/0028G11C13/004G11C13/0069G11C2213/71G11C2213/77
Inventor 刘峻
Owner YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD
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