Implementation method and device for cache consistency of multi-core processor, the multi-core processor and storage medium

Abstract

The invention discloses an implementation method and device for cache consistency of a multi-core processor, the multi-core processor and a storage medium, and the method comprises the steps: adding amodified and shared state on the basis of an MESI protocol so that when buffer in each processor of the multi-core processor, marking each cache line as any one of a modified state, a modified and shared state, an exclusive state, a shared state and a failed state; wherein the modified and shared state indicates that the data in the cache line is updated but is not written back into the memory, and the same effective copy exists in the caches of other cores; and tracking the cache line corresponding to each processor core through bus monitoring so as to perform state conversion on the corresponding cache line according to different data access modes, thereby realizing cache consistency of the multi-core processor. According to the scheme, the performance of the multi-core processor is improved by effectively reducing memory write-back operations.

Description

technical field [0001] The invention belongs to the technical field of computers, and in particular relates to a method for realizing cache consistency of a multi-core processor, a device, a multi-core processor and a storage medium, and in particular to a method for realizing cache consistency of a multi-core processor, a device, and multi-core processing devices and storage media. Background technique [0002] Multi-core means that a processor contains multiple central processing unit cores (cpu core), and two or more cores are packaged together and integrated into a processor circuit. A multicore processor is a single chip (also known as a silicon core) that plugs directly into a single processor socket, but where the operating system utilizes all associated resources to treat each of its execution cores as a discrete logical processor. By dividing tasks among multiple execution cores, multicore processors can perform more tasks in a given clock cycle. [0003] Multi-co...

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Problems solved by technology

[0006] The object of the present invention is to provide a method, device, multi-core processor and storage medium for realizing the cache coherence of a multi-core processor, so as to solve the problem of realizing the cache of a multi-core processor by keeping the cache and memory synchronization of each core in real time. Consistency, which increases the bandwidth of the multi-core processor on-chip bus and thus affects the performance of the multi-core processor, achieves the effect of improving the performance of the multi-core processor by effectively reducing memory write-back operations

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