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Calculation method of a logic operation device embedded in a memristor array

A technology of logical operation and calculation method, which is applied in the direction of calculation, instrumentation, electrical digital data processing, etc., can solve the problems of logical operation damage, single logic primitive, and increased control difficulty, so as to improve operational efficiency, reduce write-back operations, Effects of Enriching Logical Primitives

Active Publication Date: 2019-03-26
SHANGHAI JIAO TONG UNIV
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

There are also three problems with this logic operation method: 1) Like the IMPLY circuit, the logic operation is destructive; 2) Since the control voltage applied across the memristor is determined by the input, its control method is dynamic , which undoubtedly increases the difficulty of control; 3) also limited by the single logic primitive

Method used

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  • Calculation method of a logic operation device embedded in a memristor array
  • Calculation method of a logic operation device embedded in a memristor array
  • Calculation method of a logic operation device embedded in a memristor array

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Embodiment

[0042] Such as image 3 As shown, the new architecture uses two differential memristors to store one bit, and a level of CU (computing unit) is added at the end of the memristor array to calculate and temporarily store and iteratively accumulate the intermediate results of logical expressions. The FSM in the lower left corner of the figure is a state machine, which is used to control the read and write timing of the array, so as to ensure that the calculation in the memory is carried out according to the correct steps specified.

[0043] For existing logic circuits based on memristors, the basic idea is to continuously iterate the logic primitives provided by the circuit to complete complex logic operations. However, the singleness of logic primitives increases the operation steps and produces a large number of intermediate results. , this part of the results needs to be cached, so the entire operation process also involves a large number of write operations. Since the writin...

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PUM

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Abstract

The invention discloses a calculation method of a logic operation device embedded in a memristor array, which utilizes a reverse-connected differential cell structure to realize a complementary inputrepresentation, and utilizes a line OR operation on a bit line of the array to realize a maximum term. The minimum term is obtained by inverting the maximum term of the output of the sensing amplifier; Introducing arithmetic unit CU to complete the merging of the maximum term or the minimum term; The method for buffering the intermediate results generated in the iterative process by using the operation unit CU comprises the following steps of: multiplexing the row buffers in the traditional memory array, and being used for buffering the intermediate results generated in the iterative process.The invention enriches the logic primitive through the introduction of the difference unit structure and the operation unit, enables the circuit to perform the operation in the mode of sum / sum of products, and greatly reduces the write-back operation, thereby effectively improving the operation efficiency.

Description

technical field [0001] The present invention relates to the technical field of computing in memory, in particular to a computing method for a logic operation device embedded in a memristor array. Background technique [0002] At this stage, there are mainly three methods for logic operations based on memristors, namely IMPLY circuit, MAGIC circuit and Majority circuit. Different from the traditional CMOS process, the memristor uses the resistance value to store the logic information "1" and "0", and changes the state of the resistance value by changing the voltage applied to both ends, thereby completing the storage and operation operations. [0003] The memristor-based IMPLY circuit was the first to demonstrate the ability of memristors to perform logic operations. The basic structure of the IMPLY circuit is as follows figure 1 As shown in a, two memristors are connected in parallel to a load resistor. Under the action of the two voltages of VCOND and VSET, the material ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/544G06F7/57
CPCG06F7/544G06F7/5443G06F7/57G06F2207/4814G06F2207/4828Y02D10/00
Inventor 景乃锋李桃中李彤王琴蒋剑飞孙亚男毛志刚
Owner SHANGHAI JIAO TONG UNIV
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