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Caching method and system for eliminated data perception in hybrid memory environment

A data-aware, hybrid memory technology, applied in memory systems, electrical digital data processing, memory address/allocation/relocation, etc., can solve problems such as the inability to simultaneously improve the lifetime cache performance of non-volatile main memory write operations, and achieve Improved performance and improved lifespan

Active Publication Date: 2016-09-28
HUAZHONG UNIV OF SCI & TECH
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Problems solved by technology

[0006] Aiming at the above defects of the prior art, the present invention provides a caching system that eliminates data perception, and its purpose is to ensure the access hit rate of the cache so that the performance of the cache system is not affected, and it can effectively reduce the number of write-back non-volatile masters. The number of storage times to improve the life of non-volatile main memory, thereby solving the technical problem that the life of non-volatile main memory write operations and cache performance cannot be improved at the same time

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[0028] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

[0029] The present invention provides a caching method for eliminating data awareness, comprising the following steps:

[0030] (1) if figure 1 As shown, the elimination data monitoring method is carried out during the entire process of system operation, and specifically includes the following sub-steps:

[0031](1.1) Data collection: When the cache selects a specific page for elimination, cal...

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Abstract

The invention discloses a caching method and system for eliminated data perception in a hybrid memory environment, and aims to reduce the write-back frequency of a nonvolatile main memory as far as possible on the premise of ensuring the performance of the caching system so as to prolong the service life of the nonvolatile main memory. The system mainly comprises a metadata monitoring module, a page replacement module and an adaptive space division module. The monitoring module collects metadata information of cached eliminated data and analyzes an elimination weight of a page in a cache based on the metadata information; the page replacement module selects the eliminated page based on the cache performance and the service life of the nonvolatile main memory; and the adaptive space division module judges which type of page is supposed to be selected as an eliminated object in a current stage in combination with a characteristic of a request and whether the page is eliminated or not. According to the method and system, the write-back frequency of the nonvolatile main memory can be effectively reduced on the premise of ensuring the performance of the caching system so as to prolong the service life of the nonvolatile main memory.

Description

technical field [0001] The invention belongs to the field of memory computing, and more specifically relates to a caching method and caching system for eliminating data perception in a mixed memory environment. The main goal is to improve the life of non-volatile main memory on the premise of ensuring cache performance. Background technique [0002] The rapid development of memory computing technology has made it difficult for existing DRAM-based main memory systems to adapt to further development in terms of scalability and energy consumption. New opportunities, because non-volatile main memory has the advantages of non-volatility, low energy consumption and better scalability when used as memory, but in order to completely replace the existing DRAM, in terms of writing speed, dynamic energy consumption and life In terms of non-volatile main memory, it is still far away from DRAM, so a common memory structure is to use DRAM and non-volatile main memory as a mixed main memor...

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Application Information

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IPC IPC(8): G06F12/02G06F12/123
CPCG06F12/0238G06F12/123
Inventor 吴松贾佑闯金海
Owner HUAZHONG UNIV OF SCI & TECH
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