Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as trench voids, and achieve the effect of improving process efficiency

Inactive Publication Date: 2020-11-13
晶芯成(北京)科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a semiconductor structure and its manufacturing method to solve the technical problem of void defects during trench filling

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

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Experimental program
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Embodiment 1

[0036] The following is attached Figure 2-8 The semiconductor structure manufacturing method provided by the embodiment of the present invention is described in detail.

[0037] First, execute step S10, please refer to figure 2 , providing a semiconductor substrate 101 having several trenches 103 . To simplify, figure 2 Only one groove is shown in .

[0038] The semiconductor substrate 101 may be monocrystalline silicon or polycrystalline silicon, or semiconductor materials such as silicon, germanium, silicon germanium, gallium arsenide, or a composite structure such as silicon-on-insulator. Those skilled in the art can select the type of the semiconductor substrate 101 according to the semiconductor devices formed on the semiconductor substrate 101 , so the type of the semiconductor substrate 101 should not limit the protection scope of the present invention.

[0039] In a specific embodiment, the trench 103 serves as an isolation structure to provide isolation for the...

Embodiment 2

[0071] The difference from Embodiment 1 is that in step S20, the nitrogen-doped silicon oxide layer 105 is formed by an NO annealing process, and the NO annealing process is formed by gas NO and SiO in the first silicon oxide layer 104 2 reaction to generate SiO x N y , in this embodiment, the nitrogen-doped silicon oxide layer 105 is SiO x N y .

[0072] In the NO annealing process, the temperature of the annealing treatment can be set according to actual needs. Preferably, in this embodiment, the temperature of the annealing treatment is 800°C-1100°C.

[0073] In the NO annealing process, the time for the annealing treatment can be set according to actual needs. Preferably, in this embodiment, the time for the annealing treatment is less than 70s.

[0074] In the NO annealing process, the pressure of the annealing treatment can be set according to actual needs. Preferably, in this embodiment, the pressure of the annealing treatment is 500 torr-1000 torr.

[0075] In the...

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Abstract

The invention provides a semiconductor structure and a manufacturing method thereof, and the method comprises the steps: providing a semiconductor substrate which is provided with a trench; sequentially forming a first silicon oxide layer and a nitrogen-doped silicon oxide layer at the bottom and on the side wall of the trench; etching to remove part of the nitrogen-doped silicon oxide layer so asto expose the first silicon oxide layer at the bottom of the trench; and forming a second silicon dioxide layer which covers the surface of the nitrogen-doped silicon oxide layer on the side wall ofthe trench and the exposed surface of the first silicon oxide layer and fills the trench. Because the growth rate of the second silicon dioxide on the first silicon oxide layer is greater than the growth rate of the second silicon dioxide on the silicon oxynitride layer, the growth rate of the second silicon dioxide at the bottom of the trench is greater than the growth rate of the silicon oxynitride layer on the side wall of the trench, and the phenomenon that the second silicon dioxide layer on the side wall of the trench grows too fast to cause premature sealing to generate a cavity defectis avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a manufacturing method thereof. Background technique [0002] With the gradual increase in the demand for high integration and high performance of integrated circuits, semiconductor technology is developing towards technology nodes with smaller feature sizes. Currently, in the manufacturing technology of semiconductor devices, trench filling is often required to complete the preparation of the semiconductor structure and the entire device structure. [0003] However, the existing filling technology, no matter whether it is filled by chemical deposition or material growth, encounters a trench with a large aspect ratio, which is prone to filling and sealing in advance, resulting in void defects , causing the electrical performance and reliability of the device to be affected. Contents of the invention [0004] The object of the present inven...

Claims

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76224
Inventor 陶磊冯永波王厚有刘西域
Owner 晶芯成(北京)科技有限公司
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