Storage chip physical destruction judgment method, circuit and device, medium and equipment
A technology of physically destroying and storing chips, which is applied in the field of physical destruction judgment of memory chips, can solve the problems of wasting time and electric energy, and cannot be completely and completely burned, and achieve the effects of saving electric energy, efficient and thorough destruction, and completely destroying electric energy
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Embodiment 1
[0066] According to the above, combined with Figure 1 to Figure 3 , Embodiment 1 of the present invention is:
[0067] A method for judging physical destruction of a memory chip, comprising the steps of:
[0068] S1. Receive the physical destruction signal and start the destruction power supply;
[0069] Step S1 specifically includes the following steps: detecting in real time whether a destruction signal is received, if received, judging whether the destruction signal is a physical destruction signal, and if so, starting the destruction power supply.
[0070] Corresponding to this embodiment, if the receiving device is the single-chip microcomputer U1, a certain pin on the single-chip microcomputer U1 is used to receive the destruction signal, such as image 3 When the P3.2 pin detects the input of the destruction signal, the microcontroller U1 judges the destruction type of the input signal. If it is a physical destruction signal, it will be powered on from the voltage in...
Embodiment 2
[0077] According to the above, combined with Figure 1 to Figure 3 , the second embodiment of the present invention is:
[0078] A method for judging the physical destruction of a memory chip. On the basis of the first embodiment above, this embodiment provides a specific judgment method after using a specific voltage divider circuit. In other equivalent embodiments, you can refer to this embodiment for appropriate deformation.
[0079] In the second embodiment, the voltage dividing circuit includes a first resistor R1 and a second resistor R2. At this time, step S2 specifically includes the following steps: collecting the level state between the first resistor R1 and the second resistor R2 in real time, and the second The first terminal of a resistor R1 is connected in series with the first terminal of the second resistor R2, the destruction voltage terminal Vout of the destruction power supply is connected to the second terminal of the first resistor R1, and the ground term...
Embodiment 3
[0083] According to the above, combined with figure 2 and image 3 , Embodiment three of the present invention is:
[0084] A physical destroying circuit for a memory chip, comprising a single-chip microcomputer U1, a destroying power supply and a voltage divider circuit; the destroying power supply is connected to both ends of the voltage divider circuit, and the interrupt pin INT1 of the single-chip microcomputer U1 is connected to the voltage divider output end of the voltage divider circuit; the single-chip microcomputer U1 There is a physical destruction program stored in the internal memory, and the voltage dividing ratio of the voltage dividing circuit is greater than 5 / U0 And less than 2 / U 0 , U 0 is the destruction voltage value of the destruction power supply.
[0085] In this embodiment, the voltage dividing circuit includes a first resistor R1 and a second resistor R2; the destruction voltage terminal Vout of the destruction power supply is electrically connect...
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