Hardware architecture of photon tensor kernel integrated circuit for matrix calculation and neural network training method thereof

Abstract

The invention discloses a hardware architecture of a photon tensor kernel integrated circuit for matrix calculation and a neural network training method thereof. Based on the photoelectric hybrid coherent detection and electron accumulation principle, an integrated photon dot product calculation unit (hereinafter referred to as DPU) is realized, and the DPU is arranged in an array manner to form large-scale parallelized matrix multiplication calculation hardware, namely a tensor kernel. Through the design of a double-layer fan-in waveguide bus, the interconnection of two-dimensional large-scale DPU arrays is realized. The invention further specifically provides a method for applying the photon tensor kernel integrated circuit to neural network training. According to the invention, high-speed data loading and high-speed matrix calculation are realized, a wooden barrel short board effect caused by mismatching of photoelectric clock rates is avoided, due to the double-layer waveguide busdesign, waveguide crossing loss and crosstalk are avoided; and the hardware architecture can be applied to all algorithms including matrix calculation, including neural network reasoning and training.

Description

technical field [0001] The invention relates to a neural network, in particular to a photon tensor core integrated circuit architecture and a neural network training method thereof. [0002] technical background [0003] As the most basic linear mathematical calculation, matrix calculation is the core calculation unit of modern algorithms and is widely used in many systems including artificial intelligence, machine learning, automatic control, and communication systems. Especially in neural network calculations (including reasoning and training), matrix calculations are widely used and become the most computationally intensive part of neural networks. In recent years, with the development of deep learning and neural network technology, the required matrix computing resources have doubled every three and a half months, which has gradually tightened the hardware conditions supporting neural network computing. In traditional general-purpose computers, matrix calculations are pe...

AI Technical Summary

Problems solved by technology

However, in many photonic neural network architectures, a lot of attention is paid to neural network reasoning, and few architectures for neural network training are proposed.

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