Multi-level shift circuit based on composite dielectric gate double-transistor photosensitive detector
A technology of photosensitive detectors and dual transistors, which is applied in the direction of logic circuit coupling/interfaces, circuits, and electric solid-state devices using field effect transistors. The effect of sexual dominance
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Embodiment 1
[0032] In this embodiment, a multi-level shift circuit is provided, such as image 3 shown. Among them, I1 and M1~M8 constitute a pre-shift circuit, M9~M12 are drive circuits, M13 and M14 are shift circuits, M15~M19 are signal compensation circuits, and the gray part is a deep N well. The specific circuit is as follows: the pre-shift control signal V IN Connect the gate terminal of transistor M3 and the input terminal of inverter I1, the output terminal of inverter I1 is connected to the gate terminal of transistor M4, the source terminals of transistors M3 and M4 are both grounded; the drain terminal of transistor M3 is connected to the source terminal of transistor M1 , the gate terminals of the transistor M2 and the transistor M5, the drain terminal of the transistor M4 is connected to the source terminal of the transistor M2, the gate terminal of the transistor M1 and the gate terminal of the crystal M6, and the drain terminals of the transistors M1, M2, M5, and M6 are al...
Embodiment 2
[0035] In this embodiment, the above-mentioned multi-level shift circuit is used to drive the composite dielectric gate double-transistor photosensitive detector pixel, such as Figure 4 shown. C1, C2, and M0 constitute a composite dielectric gate double-transistor photosensitive detector, the gray part is a deep N well, and the outputs of multi-level conversion circuits #1, #2, #3, #4, and #5 are respectively connected to the composite dielectric The gate, drain, substrate, source, and deep N-well of the gate double-transistor photosensitive detector provide driving voltages for them.
Embodiment 3
[0037] In this embodiment, the above-mentioned multi-level shift circuit is used to drive a composite dielectric gate double-transistor photosensitive detector array, such as Figure 5 shown. The photosensitive detector array has 2 rows and 2 columns. The gate ends of the composite dielectric gate double transistor photosensitive detectors of each row are connected to form a word line, the drain terminals are connected to form a bit line, and the source terminals are connected to form a source line; all the substrates of the composite dielectric gate double transistor photosensitive detectors are connected to form a substrate, Placed in a deep N well (gray area in the figure). The outputs of multi-level conversion circuits #1 and #2 are respectively connected to the word line of the composite dielectric gate double transistor photosensitive detector array to provide driving voltage; the outputs of multi-level conversion circuits #3 and #4 are respectively connected to the com...
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