Three-dimensional memory and its preparation method

Abstract

The present application provides a three-dimensional memory and a preparation method thereof. The three-dimensional memory includes a substrate, a first stacking structure and a second stacking structure sequentially stacked on the substrate; the first stacking structure is arranged on the stacking surface of the substrate, and the first stacking structure has a For the bottom contact of the first sub-channel hole, the thickness of the first stack structure is the first thickness; the second stack structure is arranged on the surface of the first stack structure away from the substrate, and the second stack structure is provided with a For the second sub-channel hole connected to the first sub-channel hole, the thickness of the second stack structure is the second thickness, and the second thickness is smaller than the first thickness. The three-dimensional memory of the present application solves the problem that in the prior art, due to the increase in the number of stacked layers, the inclination of the channel hole in the upper layer becomes more and more serious, resulting in the inability to align with the channel hole in the lower layer, and then engraving the bottom of the channel hole in the subsequent During corrosion, it will cause sidewall damage and affect the electrical performance of the three-dimensional memory.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a three-dimensional memory and a preparation method thereof. Background technique [0002] At present, in the preparation process of three-dimensional memory, the etching process of channel hole (CH) is one of the key processes in the various processes involved in three-dimensional memory. With the increase of the number of stacked layers, the channel hole The aspect ratio of etching is further increased. In order to etch the channel hole, the channel hole is etched through two stacking processes. In the existing two-stage molding process, the inclination of the channel holes in the upper layer will affect the alignment with the channel holes in the lower layer. Alignment of the channel holes, and subsequent etching of the bottom of the channel holes will cause sidewall damage and affect the electrical performance of the three-dimensional memory. Contents of the inventi...

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Problems solved by technology

[0003] In view of this, the present application provides a three-dimensional memory and its preparation method to solve the problem that in the prior art, due to the increase in the number of stacked layers, the inclination of the channel holes in the upper layer becomes more and more serious, resulting in the inability to align with the channel holes in the lower layer. , and then when the bottom of the channel hole is etched later, it will cause sidewall damage and affect the electrical performance of the three-dimensional memory.

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