Semiconductor-on-insulator device and manufacturing method thereof

Abstract

The invention relates to a semiconductor-on-insulator device and a manufacturing method thereof. The method comprises the following steps: providing a semiconductor-on-insulator substrate; forming a patterned polycrystalline silicon structure on the semiconductor layer; photoetching and doping the body leading-out region photoetching plate to form a first conductive type ion doped region, and photoetching and doping the source-drain region photoetching plate to form a source region, a drain region and doped polycrystalline silicon; and carrying out thermal diffusion to enable the first conductive type ion doped region to diffuse to form a body lead-out region. According to the invention, the polycrystalline silicon structure has no work function difference, so that the turn-on voltage of aparasitic channel is consistent with that of a main channel region, and the hump phenomenon of a narrow-channel device can be avoided; and when the body leading-out region is doped, the doping windowis separated from the body region isolation polycrystalline silicon by a proper distance, so that the impurities in the active region can be diffused to the poly boundary, and a good body region leading-out effect can be ensured.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor-on-insulator device and a method for manufacturing the semiconductor-on-insulator device. Background technique [0002] Silicon-on-insulator (SOI) devices have a series of advantages due to their excellent performance-compared with ordinary bulk silicon devices, such as good isolation effect, no latch-up effect, good radiation resistance effect, small parasitic capacitance, and small chip design area- —The current share in mass production of integrated circuits is gradually increasing. Due to the difference of the substrate material, the layout design of the process and the device will also be somewhat different. [0003] In a traditional SOI device, the body and the source and drain of the device are isolated by a wide piece of polysilicon, a part of the polysilicon covers the surface of the body region, and a part covers the surface of the source and ...

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Problems solved by technology

In this way, abnormal curves will appear during the I-V test of narrow trench devices, such as figure 1 As shown, the Id (drain current)-Vg (gate voltage) curve will appear an inflection point as the voltage rises to a certain value ( figure 1 framed by a dotted ellipse), which is commonly referred to as the hump phenomenon

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