Systolic Array Architecture for Sparse Matrix Operations

Abstract

The invention discloses a systolic array architecture for sparse matrix operation, which includes a plurality of processing elements (PE, processing elements) arranged in a systolic array. Each processing unit includes: a dynamic selection component (DS, dynamic selection component), which is used to select the data pair to be calculated from the compressed sparse data stream and output it to the multiply-add component; the multiply-add component (MAC) ,multiplication and accumulation component), receive the data pair sent by the dynamic selection component and perform multiplication and accumulation operations on them, and output the accumulated sum to the result forwarding component after the calculation is completed; the result forwarding component (RF, result forwarding component), Forward the accumulated sum from the multiply-add component out of the array. The invention greatly improves the speed and energy consumption ratio of sparse matrix operations, and also has a significant speed improvement when the matrix sparsity is low. In addition, in order to achieve the optimization of storage and calculation, in some tasks, the data in the same matrix needs to be Characterized with varying degrees of precision. The present invention can also operate on sparse matrices with mixed precision.

Description

Technical field: [0001] The invention relates to a computer architecture, in particular to a systolic array architecture for sparse matrix operations. Background technique [0002] The acceleration of sparse matrix operations (including sparse matrix-vector, matrix-matrix multiplication, etc.) is one of the important basic problems faced in scientific exploration and engineering practice. A sparse matrix (vector) refers to a matrix (vector) containing a large number of 0 elements, where the proportion of 0 elements is represented by the degree of sparsity. Among the operations performed on sparse matrices, some multiplication and addition operations, because they contain one or two operands equal to 0, can be removed without affecting the result. Therefore, in the process of performing sparse matrix operations, this part of invalid operations can be removed without affecting the calculation results, thereby achieving an improvement in the ratio of speed and energy consumpti...

AI Technical Summary

Problems solved by technology

However, it is difficult for general-purpose computing platforms to effectively accelerate the processing of fine-grained mixed-precision data.

On the other hand, adding additional data paths to the accelerator to calculate mixed-precision data will bring a certain amount of overhead: when the proportion of high-precision data is too low, the high-precision data paths may be idle and cause waste; On the one hand, when the proportion of high-precision data is too high, the congestion caused by the full load of high-precision data channels may reduce the performance of the entire systolic array

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