Half-cell structure of gate power MOSFET anti-single-particle-burnout device

Abstract

The invention proposes a half-cell structure of a gate power MOSFET anti-single-particle-burnout device. According to the structure, an N-type buffer layer with an N-type local doped region is manufactured in the drain (cathode) electrode region of a semiconductor power device, which can significantly reduce the electric field peak and impact ionization degree of a semiconductor power device driftregion and high and low junctions of a substrate. The number of carriers generated by avalanche multiplication caused by impact ionization can be reduced. The transient current acting on a parasiticbipolar transistor is greatly reduced, so that the parasitic bipolar transistor is difficultly turned on. The device's ability to resist single particle burnout can be improved without sacrificing basic electrical characteristics.

Description

Technical field [0001] The invention relates to an anti-radiation reinforcement technology for a power semiconductor device, in particular to a half-cell structure of a gate power MOSFET that resists single-particle burnout. Background technique [0002] Power semiconductor devices have the advantages of large driving current, high breakdown voltage, fast speed, low power consumption, and large output power. They can achieve power control and conversion in different ranges. They are widely used in power management of satellites and spacecraft. The application field has huge development potential. Power semiconductor devices usually have the characteristics of small size and high working voltage, and their working stability is easily affected by the natural radiation environment in space, especially triggered by the single event burnout (SEB) effect. SEB is usually triggered by heavy ion radiation. After heavy ions enter the device along the trajectory, the high electric field pe...

AI Technical Summary

Problems solved by technology

For example, P + The method of expanding the source region is likely to cause a decrease in the carrier concentration in the channel region, which can reduce the forward conduction current density of the device; the introduction of the buffer layer reduces the peak electric field of the substrate junction and is accompanied by a decrease in the forward conduction resistance. increase; the introduction of the minority carrier lifetime recombination center will definitely cause an increase in the reverse leakage current density of the device, which will lead to an increase in power consumption, which does not meet the requirements of low power consumption for aerospace semiconductor devices, and the current resistance to power semiconductor devices The single event burnout strengthening is mainly concentrated on the planar gate structure, and there are few studies on the anti-single event strengthening of trench gate power semiconductor devices

Images