Semiconductor structure and formation method thereof

Abstract

The invention provides a semiconductor structure and a formation method thereof. The method comprises the following steps: providing a substrate, wherein the substrate comprises a first region and a second region, and the substrate has an isolation structure; forming a protection layer on the second region substrate and the second region isolation structure; forming a doping layer on the first region substrate, the first region isolation structure and the protection layer; carrying out annealing treatment on the doping layer to enable doping ions in the doping layer to diffuse into the first region substrate to form a first doped region; and after carrying out annealing treatment on the doping layer, removing the doping layer. The method enables the performance of the semiconductor structure to be good, and the formation process of the semiconductor structure is simple.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the improvement of the integration level of semiconductor devices, the critical dimensions of transistors are continuously reduced, and the width of the gate structure is also reduced, so that the length of the channel under the gate structure is continuously reduced. The reduction of the channel length in the transistor increases the possibility of charge punching between the source and drain doped regions, and easily causes channel leakage current. [0003] The gate of the Fin Field-Effect Transistor (FinFET) has a forked 3D structure similar to a fish fin. The channel of the FinFET protrudes from the surface of the substrate to form a fin, and the gate covers the top surface and side walls of the fin, which can control the on and off of the circuit on both sides of t...

AI Technical Summary

Problems solved by technology

[0005] However, the existing solid source doping process easily leads to poor isolation performance of the formed fin field effect transistor isolation structure, and poor performance of the semiconductor structure.

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