Capacitor device structure, capacitor and manufacturing method thereof
A technology of device structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, capacitors, electric solid-state devices, etc., can solve the problems of easily damaged electrical properties, poor fatigue resistance of devices, and low capacitance density of capacitors. Good performance, reduced bending resistance, and reduced sheet resistance
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Embodiment 1
[0061] At 20°C, with O 2Plasma pre-treats plastic surfaces. At 150°C, use ALD method to deposit AZO conductive film as the bottom layer, then use spin coating method to lay nanowires on the bottom layer, and then use ALD method to deposit AZO conductive film on the bottom layer to cover the wire layer to obtain a layer of 100nm A thick AZO / AgNW / AZO composite film was used as the bottom electrode, on which a 10 nm thick layer of ZrO was deposited at 150 °C 2 (k value is about 22) thin film as dielectric layer 4, at 150 ℃, AZO conductive film is deposited on the dielectric layer 4 with the method of ALD as the bottom layer, and then the nano wire is laid on the bottom layer by the method of spin coating, and then ALD The method deposited AZO conductive film on the bottom layer to cover the wire layer, and prepared a layer of 100nm thick AZO / AgNW / AZO composite film as the top electrode. Perform photolithography and wet etching on the top electrode to form devices one by one, an...
Embodiment 2
[0063] For ease of description, the following method is referred to as the method of ALD plus spin coating: use ALD to deposit a conductive film as the bottom layer, then use the spin coating method to lay nanowires on the bottom layer, and then use the ALD method to deposit a conductive film on the bottom layer Cover the wire layer.
[0064] At 80°C, with O 2 The plastic surface is pretreated by plasma. At 100°C, a 60nm-thick AZO / CNT / AZO composite film is prepared by ALD and spin coating as the bottom electrode. At 100°C, a layer 10nm thick ZrO 2 (k value is about 22) film as the dielectric layer 4 . At 100°C, a 60nm-thick AZO / CNT / AZO composite film was prepared on the dielectric layer 4 by ALD and spin coating as the top electrode, and the top electrode was photolithographically and wet-etched to form individual devices. , the size of a single device is preferably 100 μm×100 μm.
Embodiment 3
[0066] At 20°C, a 20nm thick AZO film was deposited on the PEN surface by magnetron sputtering, and a 80nm thick AZO / AgNW / AZO composite film was prepared by ALD and spin coating at 80°C as Bottom electrode, at 80°C, deposit a layer of 20nm thick TiO on the bottom electrode 2 (k value is about 80) thin film is used as the dielectric layer 4, at 80 ℃, on the dielectric layer 4, prepare a layer of 80nm thick AZO / AgNW / AZO composite thin film with the method of ALD and spin coating as the top electrode, the top electrode Perform photolithography and wet etching to form devices one by one, and the size of a single device is preferably 100 μm×100 μm.
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