Element semiconductor lateral super-junction double-diffused transistor with function of optimizing lateral and longitudinal electric fields synchronously

Abstract

The invention discloses an element semiconductor lateral super-junction double-diffused transistor with a function of optimizing lateral and longitudinal electric fields synchronously. According to the structure, a substrate-assisted depletion buried layer is arranged below a drifting region at the drain end; and meanwhile, a substrate buried layer with a charge compensation function is arranged in a substrate region, close to the substrate-assisted depletion buried layer, below the drifting region. By virtue of the setting of the substrate-assisted depletion buried layer, a longitudinal spacecharge region of a lateral super-junction double-diffused metal oxide semiconductor field effect transistor can be expanded; by virtue of the buried layer, a surface lateral electric field and an in-vivo longitudinal electric field can be modulated through an electric field modulation effect; by virtue of the setting of the substrate buried layer with the charge compensation function, the problemof substrate-assisted depletion existing the super junction can be eliminated; and a new electric field peak is introduced to the surface lateral electric field and the in-vivo longitudinal electricfield of the lateral super-junction double-diffused metal oxide semiconductor field effect transistor separately, so that the surface lateral electric field and the in-vivo longitudinal electric fieldcan be optimized synchronously, thereby greatly improving the breakdown voltage of a device.

Description

technical field [0001] The invention relates to the technical field of semiconductor power devices, in particular to a lateral superjunction double-diffusion transistor. Background technique [0002] One of the most critical technologies for realizing power integrated circuit PIC (power integrated circuit) is that LDMOS (lateral double-diffused MOSFET) must have low on-resistance to reduce the power loss of PIC integrated circuit, while MOS devices are off-state. The 2.5th power relationship between the breakdown voltage and the on-state on-resistance limits the high-power application range of MOS devices. The superjunction structure alleviates this contradiction to the 1.33th power. Therefore, the superjunction technology is applied to LDMOS to form SJ- LDMOS is an effective way to realize ultra-low power consumption PIC. However, there are three problems in the super junction applied to LDMOS: 1) The P-type substrate of N-channel LDMOS assists in depleting the N-type regi...

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Problems solved by technology

However, there are three problems in the super junction applied to LDMOS: 1) The P-type substrate of N-channel LDMOS assists in depleting the N-type region of the superjunction, which brings about the problem of substrate-assisted depletion (SAD) ; 2) Traditional SJ-LDMOS only forms electric field modulation between the N region and P region of the super junction, but there is no electric field modulation on the surface; 3) SJ-LDMOS that eliminates substrate-assisted depletion can completely deplete the drift region , but due to the influence of the longitudinal electric field, the surface electric field distribution is not uniform

[0005] The above two schemes are actually optimized for the vertical electric field of the device, but the optimization effect for the horizontal electric field is very limited

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