Strengthening method for resisting against single event upset of ferroelectric memory

Abstract

The invention provides a strengthening method for resisting against single event upset of ferroelectric memory. The method comprises the following steps: selecting sample chips and grouping according to irradiation dose; comparing a radiation sample with a non-radiated sample and removing the sample chips with seriously degraded performances; performing a single event upset test on the acquired sample chips with normal performances on a heavy ion accelerator; taking the non-radiated same-batch sample chips as control groups; testing under a same experimental environment; acquiring the single event upset sections of the sample chips under different accumulated dosages; analyzing section data in e, thereby acquiring an optimal accumulated dosage meeting the strengthening requirement; and taking the optimal accumulated dosage as a standard dosage for resisting against single event upset and reinforcing of the ferroelectric memory. The invention relates to an external reinforcing method; the layout and production process of the chips are not changed and the packaging size and the working sequence of the chips are not changed, so that the reinforced chips can be directly used for replacing the unreinforced chips; and the circuit does not need to be redesigned.

Description

technical field [0001] The invention belongs to the field of anti-radiation hardening of semiconductor devices, in particular to a method for hardening anti-single-event reversal of a ferroelectric memory, and is especially suitable for hardening a commercial ferroelectric memory storing fixed data. Background technique [0002] Semiconductor memory is an indispensable and important component in aerospace electronic systems, and is responsible for various data storage tasks. With the rapid development of the aerospace industry, the demand for high-performance memory in related industries is increasing day by day, but the existing memory technology has exposed some obvious defects. The volatile nature of SRAM and DRAM causes them to lose data when the power is turned off, while the writing speed of traditional non-volatile memory FLASH and EEPROM is slow and the power consumption is high. [0003] Ferroelectric memory (FRAM) is a new type of non-volatile memory that integrat...

AI Technical Summary

Problems solved by technology

For the storage unit of ferroelectric memory, its failure is mainly due to the transient pulse generated by the NMOS connected to the ferroelectric capacitor being bombarded by single particles, which leads to the charging and discharging of the ferroelectric capacitor, thereby affecting its polarization state

In addition, during the read-out process of ferroelectric memory, the capacitor storing data needs to be reversed in polarization state. This is a destructive read-out method. Therefore, after the read-out is completed, the read-out data must be rewritten back to the ferroelectric memory. Capacitance, in this process, if the single event effect of the peripheral circuit causes the disturbance of the bit line signal, these disturbances will also be written into the ferroelectric capacitor, resulting in a change in the polarization state, which in turn triggers data flipping

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