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A Gaussian Error Function Circuit Applied to Neural Network

A technology of Gaussian error function and neural network, applied in biological neural network models, electrical digital data processing, digital data processing components, etc., can solve the problems of low precision and large area, achieve high circuit precision, small area, and promote The effect of the study

Active Publication Date: 2019-03-29
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It solves the defects of low precision and large area of ​​the traditional Gaussian error function circuit

Method used

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  • A Gaussian Error Function Circuit Applied to Neural Network
  • A Gaussian Error Function Circuit Applied to Neural Network
  • A Gaussian Error Function Circuit Applied to Neural Network

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Experimental program
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Embodiment Construction

[0028] The specific implementation manners of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0029] At present, there are two common traditional Gaussian error function circuit implementation methods, one is to use the square root function shown in formula (3) to design hardware, where ε(x) represents the error. The Matlab software simulation results of the algorithm are shown in figure 1 . It can be seen that the accuracy of the algorithm is very low, and the maximum absolute error |ε(x)| is 6.3*10 -3 , the accuracy is extremely poor, so it is not suitable for the design of hardware circuits.

[0030]

[0031] Another traditional implementation is to use the Taylor expansion method to perform Taylor expansion on erf(x) in the [-3,3] interval, which can be expressed as:

[0032]

[0033] When n=28, the hardware output error curve of the hardware implementation is as follows: figure 2 shown. Its maximum absol...

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Abstract

The invention discloses a Gaussian error function circuit applied to neural networks. The Gaussian error function circuit comprises three squarers, two multipliers, two multiplier-adders, two dot product digital signal processors, an adder, a derivation DSP, and an exponent DSP. The DSPs are Design Ware floating-point DSPs from Synopsys. The circuit has a simple structure, uses DSPs easy to obtain, and is easy to implement. Compared with the traditional Taylor expansion method implementation scheme, the circuit has very obvious advantages in terms of precision, area and speed, and especially, the precision is at least two orders of magnitude higher. Meanwhile, the circuit can be implemented using a Verilog code, and has nothing to do with any specific process, so that the circuit can be applied to different processes very easily and is of very strong portability. The Gaussian error function circuit can be applied to the design of various hardware circuits related to neural networks as a soft-core IP.

Description

technical field [0001] The invention relates to the field of neural network and integrated circuit design, in particular to a Gaussian error function circuit applied to the neural network. Background technique [0002] Since American psychologist W. McCulloch and mathematician W. Pitts proposed a simple neuron model in 1943, neural network technology ushered in the first upsurge. Later, in the 1970s and 1980s, due to the limitation of computer computing level at that time, the neural network could not be well developed, so the research entered a low ebb. Recently, due to the rapid development of integrated circuit technology, the integration level and computing power of integrated circuits have been rapidly improved, which makes the neglected neural network re-enter the research field of vision, and then develop rapidly and have been widely used. [0003] In the neural network, neurons communicate through all-or-none action potentials, that is, nerve impulses (Spike), so th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/063G06F7/575G06F7/556G06F7/544
CPCG06F7/5443G06F7/556G06F7/575G06N3/063
Inventor 乔志通韩雁张世峰雷健孙龙天
Owner ZHEJIANG UNIV
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