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SPiN diode with GaAs-Ge-GaAs heterostructure and preparation method of SPiN diode

A gaas-ge-gaas, heterogeneous structure technology, applied in the direction of diodes, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as incompatibility, low integration, large area, etc., to improve performance and improve injection efficiency and the effect of current

Inactive Publication Date: 2017-02-22
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, the materials used in SPiN diodes used in plasma reconfigurable antennas at home and abroad are all bulk silicon materials. This material has the problem of low carrier mobility in the intrinsic region, which affects the carrier concentration in the intrinsic region of the SPiN diode. Affect its solid-state plasma concentration; and the P region and N region of this structure are mostly formed by implantation process, which requires a large implant dose and energy, high requirements on equipment, and is incompatible with existing processes; and the diffusion process, Although the junction depth is deep, but at the same time, the area of ​​the P region and the N region is large, the integration degree is low, and the doping concentration is uneven, which affects the electrical performance of the SPiN diode, resulting in poor controllability of the solid-state plasma concentration and distribution.

Method used

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  • SPiN diode with GaAs-Ge-GaAs heterostructure and preparation method of SPiN diode
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  • SPiN diode with GaAs-Ge-GaAs heterostructure and preparation method of SPiN diode

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Embodiment 1

[0053] See figure 1 , figure 1 It is a flowchart of a method for manufacturing a GaAs-Ge-GaAs heterostructure SPiN diode according to an embodiment of the present invention. The method is suitable for preparing a GeOI-based lateral SPiN diode, and the GeOI lateral SPiN diode is mainly used for manufacturing a solid-state plasma antenna. The method comprises the steps of:

[0054] (a) Select a GeOI substrate,

[0055] (b) etching the top Ge layer of the GeOI substrate to form a first trench and a second trench in the top Ge layer;

[0056] (c) depositing a GaAs material in the first trench and the second trench;

[0057] (d) performing P-type ion implantation on the GaAs material in the first trench by an ion implantation process to form a P-type active region, and performing N-type ion implantation on the GaAs material in the second trench to form an N-type active region. source area;

[0058] (e) forming lead holes on the surface of the P-type active region and the surfa...

Embodiment 2

[0097] See Figure 2a-Figure 2r , Figure 2a-Figure 2r It is a schematic diagram of a preparation method of a GaAs-Ge-GaAs heterostructure SPiN diode according to an embodiment of the present invention. On the basis of the above-mentioned embodiment 1, the channel length is 22nm (the length of the solid-state plasma region is 100 microns) The GaAs-Ge-GaAs heterostructure SPiN diode is taken as an example to describe in detail, and the specific steps are as follows:

[0098] Step 1, substrate material preparation steps:

[0099] (1a) if Figure 2a As shown, the (100) crystal orientation is selected, the doping type is p-type, and the doping concentration is 10 14 cm -3 A GeOI substrate sheet 101, the thickness of the top layer Ge is 50 μm;

[0100] (1b) if Figure 2b As shown, the method of chemical vapor deposition (Chemical vapor deposition, referred to as CVD) is used to deposit a layer of the first SiO with a thickness of 40nm on the GeOI substrate. 2 layer 201;

[...

Embodiment 3

[0128] Please refer to image 3 , image 3 It is a schematic diagram of a device structure of a heterogeneous Ge-based SPiN diode according to an embodiment of the present invention. The GaAs-Ge-GaAs heterostructure SPiN diode adopts the above-mentioned as figure 1 The preparation method shown is made, specifically, the SPiN diode of the GaAs-Ge-GaAs heterostructure is prepared and formed on the GeOI substrate 301, and the P region 304, the N region 305 of the SPiN diode and the lateral position of the P region 304 The i region (intrinsic region) between the N region 305 is located in the top layer Ge302 of the GeOI substrate. Wherein, the SPiN diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 304 and the N region 305, and the depth of the isolation trench 303 is greater than or equal to the thickness of the top layer Ge302.

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Abstract

The invention relates to a SPiN diode with a GaAs-Ge-GaAs heterostructure and a preparation method of the SPiN diode. The preparation method comprises the following steps: (1) selecting a GeOI substrate; (b) etching a Ge layer as a top layer of the GeOI substrate to form a first groove and a second groove in the Ge layer as the top layer; (c) depositing GaAs materials in the first groove and the second groove respectively; (d) carrying out P-type ion implantation on the GaAs material in the first groove by utilizing an ion implantation process to form a P-type active region, and carrying out N-type ion implantation on the GaAs material in second first groove by utilizing second ion implantation process to form an N-type active region; and (e) forming lead wire holes in the surfaces of the P-type active region and the N-type active region respectively, and sputtering metal to form the SPiN diode with the GaAs-Ge-GaAs heterostructure. According to the SPiN diode disclosed by the embodiment of the invention, by utilizing a deep trench isolation technology and the ion implantation process, the high-performance Ge-based SPiN diode suitable for forming a solid-state plasma antenna can be prepared and supplied.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a GaAs-Ge-GaAs heterostructure SPiN diode and a preparation method thereof. Background technique [0002] At present, the materials used in SPiN diodes used in plasma reconfigurable antennas at home and abroad are all bulk silicon materials. This material has the problem of low carrier mobility in the intrinsic region, which affects the carrier concentration in the intrinsic region of the SPiN diode. Affect its solid-state plasma concentration; and the P region and N region of this structure are mostly formed by implantation process, which requires a large implant dose and energy, high requirements on equipment, and is incompatible with existing processes; and the diffusion process, Although the junction depth is deep, the area of ​​the P region and the N region is large, the integration degree is low, and the doping concentration is uneven, which affects the electric...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L21/336H01L29/872
CPCH01L29/8725H01L29/0684H01L29/66219
Inventor 王斌苏汉王禹胡辉勇杨佳音张鹤鸣宋建军舒斌宣荣喜苗渊浩郝敏如
Owner XIDIAN UNIV
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