LDMOS transistor and LDMOS transistor forming method
A transistor and semiconductor technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as poor performance of fin-type LDMOS transistors, and achieve the effect of improving performance
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Embodiment 1
[0073] This embodiment is described by taking two adjacent LDMOS transistors with a common drain.
[0074] Incorporate references Figure 8 and Figure 9 , the semiconductor substrate 20 is provided.
[0075] In this embodiment, the semiconductor substrate 20 is a silicon substrate. The semiconductor substrate 20 has at least one fin 201 . There is an insulating layer 202 lower than the fins 201 between the fins 201 . The material of the insulating layer 202 is silicon oxide. The specific formation method is as follows:
[0076] A patterned first mask layer (not shown) is formed on the semiconductor substrate 20, and the patterned first mask layer defines the positions of the fins to be formed; using the patterned first mask The layer is a mask to etch the semiconductor substrate 20 to form at least one raised structure, and then an insulating layer 202 with the same height and lower than the raised structure is formed between the raised structures, and the insulating la...
Embodiment 2
[0160] refer to Figure 12 , the present invention also provides an LDMOS transistor structure, two adjacent LDMOS transistors share one drain. Specifically, it includes: a semiconductor substrate 20, the semiconductor substrate 20 has a fin 201; a first gate structure 21 and a second gate structure spanning the fin 201 and covering the top and sidewalls of the fin 201 respectively 22. The first gate structure 21 and the second gate structure 22 cover the top and sidewalls of the fins 201 respectively;
[0161] The first source electrode 251 and the drain electrode 264 in the semiconductor substrate on both sides of the first gate structure 21 , the second source electrode 252 and the drain electrode in the semiconductor substrate on both sides of the second gate structure 22 264, the drain 264 is the common drain of two adjacent LDMOS transistors;
[0162] The LDMOS transistor in this embodiment further includes:
[0163] The drift region 203, the drift region is located i...
Embodiment 3
[0173] refer to Figure 13 , This embodiment provides a method for forming an LDMOS transistor. The difference between this embodiment and Embodiment 1 is that Embodiment 1 has two sources, which are a first source electrode and a second source electrode respectively. The first source and the second source share one drain. The LDMOS transistor in this embodiment has only one source 35, and the drain 364 in this embodiment is not a common drain. There is only one gate structure 31 between the source electrode 35 and the drain electrode 364 in this embodiment. The gate structure 31 partially covers the drift region 303 . Dummy drain 361 , dummy drain 362 , dummy drain 363 , and drain 364 are all within drift region 303 . In other embodiments, the number of dummy drains is not limited or there is no dummy drain, which belong to the protection scope of the present invention.
[0174] A first barrier layer 331 to a first barrier layer 334 are formed on the drift region to defin...
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