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Preparation method of large on-off ratio field effect transistor

A technology of field effect transistors and switching ratios, which is applied in the field of nano-electromechanical systems (NEMS), can solve the problems of unfavorable field-effect transistors widely used, achieve high response speed, ensure response speed, and overcome limitations

Inactive Publication Date: 2016-03-30
WENZHOU UNIVERSITY
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Problems solved by technology

However, after testing, it was found that when the transition metal sulfide is transferred to the substrate, its carrier mobility is only a few hundred cm 2 V –1 s – 1 , while transferred to a SiO 2 substrate, single-layer graphene can still reach 10,000 cm 2 V –1 s –1 , the carrier mobility has a great influence on the response speed of the transistor, so the relatively small carrier mobility is not conducive to the wide application of transition metal sulfide-based field effect transistors

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  • Preparation method of large on-off ratio field effect transistor
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  • Preparation method of large on-off ratio field effect transistor

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Embodiment Construction

[0019] The present invention will be further described below in conjunction with the accompanying drawings and embodiments, but not as a basis for limiting the present invention.

[0020] Example. A preparation method of a field-effect transistor with a large switching ratio is characterized in that, the steps are as follows:

[0021] ① Prepare graphene flakes and tungsten disulfide flakes by mechanical exfoliation method, select single crystal silicon wafers with an oxide layer as the substrate, transfer graphene flakes, tungsten disulfide flakes, and graphene flakes to the substrate in sequence to form Graphene heterojunction;

[0022] ② Evenly spin-coat photoresist on the graphene heterojunction, then transfer the pattern on the mask plate to the photoresist through exposure, and use electron beam evaporation to deposit Ti / Au metal to obtain Ti / Au electrode, and obtain Graphene heterojunction based tunneling field effect transistor.

[0023] Preferably, the mec...

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Abstract

The invention discloses a preparation method of a large on-off ratio field effect transistor. The preparation method is characterized by comprising the following steps: (1) preparing graphene sheets and a tungsten disulfide sheet according to a mechanical exfoliation method, selecting a monocrystalline silicon wafer with an oxidation layer to serve as a substrate, and transferring one graphene sheet, the tungsten disulfide sheet and the other graphene sheet on the substrate sequentially to form a graphene heterojunction; and (2) uniformly coating photoresist in a spinning manner on the graphene heterojunction, transferring patterns on a mask onto the photoresist via exposure, and depositing Ti / Au metal via electron beam vapor deposition to obtain Ti / Au electrodes, so as to obtain the tunneling field effect transistor based on the graphene heterojunction. As the high carrier mobility of graphene and band gaps of transition metal dichalcogenides are taken into consideration, and the heterojunction of graphene and tungsten disulfide is taken as a channel material, the prepared field effect transistor is high in response speed and large in on-off ratio.

Description

technical field [0001] The invention relates to the application field of nano-electromechanical systems (NEMS), in particular to a method for preparing field-effect transistors with large switching ratios that can be used in digital logic circuits. Background technique [0002] Graphene is carbon atoms with sp 2 Orbital hybridization forms a planar film with a hexagonal honeycomb lattice, which possesses unique mechanical and electrical properties. Its high electron mobility, quantum Hall effect at room temperature, ballistic transport, and spin-polarized transport have great application potential in the future microelectronics field, and it is likely to replace silicon as an ideal material for next-generation transistors. At present, the most mature device concept of graphene in the field of microelectronics is the graphene field effect transistor. The two most promising application directions of this structure are digital logic circuits and radio frequency circuits. A...

Claims

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Application Information

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IPC IPC(8): H01L21/335H01L29/76
CPCH01L29/66409H01L29/76
Inventor 郑蓓蓉薛伟王权白冰张淼周晨
Owner WENZHOU UNIVERSITY
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