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Preparation method of planar triode chip

A triode, planar technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as limiting the application of triodes, voltage drop, soft breakdown, etc., to solve the voltage drop or soft breakdown characteristics, reduce The effect of production costs

Active Publication Date: 2016-03-23
CHINA ZHENHUA GRP YONGGUANG ELECTRONICS CO LTD STATE OWNED NO 873 FACTORY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the platinum diffusion process is widely used in the production of diodes using the mesa process, the planar triode has high requirements for the control of surface metal contamination, so this type of device will have a voltage drop or soft breakdown after the platinum diffusion process is used. thus limiting the application in triodes in platinum diffusion

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0020] The surface of the silicon wafer is chemically cleaned, and the oxidized silicon wafer is subjected to photolithography once to carve out the boron base expansion area for boron diffusion. The base region of the transistor is formed after boron diffusion, followed by a second photolithography for phosphorous diffusion in the emitter region. The obtained silicon wafer is tested for sheet resistance and breakdown characteristic voltage, and after the test meets the standards, phosphorus diffusion and platinum diffusion are performed to form a recombination center. The specific process of platinum diffusion is to fill the diffusion furnace with nitrogen, control the loading time of platinum diffusion to be 1s, carry out platinum diffusion at a temperature of 850°C for 30min, unload and control the unloading time to 1s. The metal impurities produced by platinum diffusion are removed by phosphorus diffusion and gettering process. The specific process is to fill the diffusion...

Embodiment 2

[0022] The surface of the silicon wafer is cleaned, and the oxidized silicon wafer is subjected to photolithography once to carve out a boron base expansion area for boron diffusion. The base region of the transistor is formed after boron diffusion, followed by a second photolithography for phosphorous diffusion in the emitter region. The obtained silicon wafer is tested for resistance and breakdown characteristic voltage, and after the test meets the standards, phosphorus diffusion and platinum diffusion are performed to form a recombination center. The specific process of platinum diffusion is to fill the diffusion furnace with nitrogen, control the loading time of platinum diffusion for 5 seconds, carry out platinum diffusion at 870° C. for 25 minutes, unload and control the unloading time for 5 seconds. The metal impurities produced by platinum diffusion are removed by phosphorus diffusion and gettering process. The specific process is to fill the diffusion furnace with ph...

Embodiment 3

[0024] The surface of the silicon wafer is chemically cleaned, and the oxidized silicon wafer is subjected to photolithography once to carve out the boron base expansion area for boron diffusion. The base region of the transistor is formed after boron diffusion, followed by a second photolithography for phosphorous diffusion in the emitter region. The obtained silicon wafer is tested for sheet resistance and breakdown characteristic voltage, and after the test meets the standards, phosphorus diffusion and platinum diffusion are performed to form a recombination center. The specific process of platinum diffusion is to fill the diffusion furnace with nitrogen, control the loading time of platinum diffusion for 10 s, conduct platinum diffusion at 900° C. for 20 min, unload and control the unloading time for 10 s. Metal impurities generated by platinum diffusion are removed by phosphorus diffusion gettering process. The specific process is to fill the diffusion furnace with phosp...

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PUM

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Abstract

The invention relates to the field of triode manufacturing, and particularly relates to a preparation method of a planar triode chip. According to the preparation method of the planar triode chip, the surface of a silicon wafer is cleaned, and then oxidation and photoetching processing is performed on the surface of the silicon wafer; boron diffusion, phosphorus diffusion and platinum diffusion are performed on the obtained silicon wafer so that a composite center is formed; metal impurities on the surface of the composite center are removed by a phosphorus diffusion impurity absorption technology; and steam aluminum, alloy, passivation, back thinning and back metallization processing is performed on the silicon wafer of which the metal impurities are removed so that the planar triode chip is obtained. A triode is prepared by the platinum diffusion technology so that production cost is greatly reduced, and the preparation method is suitable for batch production of the triode.

Description

technical field [0001] The invention relates to the field of triode manufacturing, in particular to a method for preparing a planar triode chip. Background technique [0002] In recent years, with the development of power electronics technology, fast recovery diodes have been more and more widely used in circuits such as switching power supplies. In the manufacture of fast recovery diodes, the method to reduce the minority carrier lifetime of the device and improve the switching speed of the device is to introduce a recombination center inside the device. Using platinum diffusion method to reduce the reverse recovery time t rr , the effect is remarkable. Therefore, the platinum diffusion process is an important process in the current production of silicon semiconductor power devices. [0003] The triode is a basic current-controlled semiconductor component that has the function of current amplification and switching. It can turn a weak electrical signal into a signal of a...

Claims

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Application Information

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IPC IPC(8): H01L21/331H01L21/22
CPCH01L21/2225H01L29/66234
Inventor 彭文忠邓其明钟俊张开云孟繁新包祯美
Owner CHINA ZHENHUA GRP YONGGUANG ELECTRONICS CO LTD STATE OWNED NO 873 FACTORY
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