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High-quality gate oxide forming method

A gate oxide layer, high-quality technology, applied in the SiCoN dry etching process, gate oxide layer formation technology, high-quality gate oxide layer formation field, can solve the problems of native oxide layer growth, etc., to improve product performance, improve quality effect

Active Publication Date: 2015-10-21
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0016] However, no matter whether the silicon oxide before the gate oxide growth is removed by the wet method or the SiCoNi process, there is a difficult problem to solve, that is, during the period between the removal of this layer of silicon oxide and the growth of the gate oxide layer, The native oxide layer will still grow
At present, the thickness of the native silicon oxide layer can only be controlled by strictly controlling the queuing time (Q-time) to reduce its impact

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Embodiment Construction

[0040] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0041] It should be noted that the technical solution proposed by the present invention is the same as the prior art, using SiCoNi to remove the native silicon oxide layer on the silicon surface or the residual silicon oxide layer from the previous process, which is different from the prior art However, it only needs the etching step in the SiCoNi process, and does not need to use high temperature to remove the (NH4) on the silicon surface. 2 SiF 6 Layer volatilized, but keep this layer (NH4) 2 SiF 6 , Making it a protective layer on the silicon surface to prevent the formation of native silicon oxide. Has (NH4) 2 SiF 6 After the protective film wafer goes to the high-temperature oxidation furnace, during the heating process of the oxidation furnace, (NH4) 2 SiF 6 It will be completely decomposed and volatilized, so it will not affect th...

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Abstract

The invention provides a high-quality gate oxide forming method. The method comprises the following steps that a wafer already undergoing shallow trench isolation is provided; the wafer is placed in an iCoNi reaction chamber to remove a native silicon oxide layer on the silicon face; (NH4)2SiF6 will be formed on the wafer surface during a SiCoNi etching reaction process; in a normal temperature condition, the (NH4)2SiF6 layer will not be removed in the SiCoNi reaction chamber; instead, the (NH4)2SiF6 layer will be kept as a protective layer on the wafer surface to prevent silicon exposure and native oxide regeneration; then the wafer is placed in an oxidation furnace; after the wafer enters the oxidation furnace, the (NH4)2SiF6 protective layer will be decomposed and volatilized when the temperature of the oxidation furnace rises; and if the highest technical temperature of the oxidation furnace continuously rises to satisfy the temperature and technical condition required for gate oxide growing, then the gate oxide starts to grow. By means of the technical solution, the native silicon oxide can be prevented from being formed on the wafer surface again before the gate oxide is formed. The gate oxide quality is improved. Product performance improvement can be further facilitated.

Description

Technical field [0001] The invention relates to the field of semiconductor devices and processing and manufacturing, in particular to gate oxide layer formation technology and SiCoN dry etching process in the field of semiconductor integrated circuit manufacturing; more specifically, to a method for forming a high-quality gate oxide layer. Background technique [0002] The formation of gate oxide layer is a very critical technology in integrated circuit manufacturing, which directly affects the electrical performance and reliability of the device. At present, this layer of gate silicon oxide is mainly formed by thermal oxidation. Below 32nm, HK materials have been used as gate oxides, such as hafnium oxide. Before the gate oxide layer is grown, the surface of the wafer is cleaned to remove the native silicon oxide layer on the surface or the silicon oxide layer (pad oxide layer or native silicon oxide layer) remaining from the previous process. The quality of this layer of nati...

Claims

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Application Information

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IPC IPC(8): H01L21/28
CPCH01L21/28
Inventor 雷通张红伟李芳
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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