Tunneling field effect transistor and preparation method

Abstract

The invention discloses a tunneling field effect transistor and a preparation method, and belongs to the field of a field effect transistor logic device of a CMOS (Complementary Metal Oxide Semiconductor) ultra-large scale integrated circuit (ULSI). A tunneling source region and a channel region of the tunneling field effect transistor are of heterogeneous structures in the vertical direction of the device; the upper layer is made of a semiconductor material with larger forbidden bandwidth; the middle layer is made of a semiconductor material with smaller forbidden bandwidth; the lower layer is a semiconductor substrate with the larger forbidden bandwidth. Compared with the prior art, the transistor and the method have the advantages that the degradation phenomenon of sub-threshold slope in device transfer characteristic can be effectively inhibited, meanwhile the average sub-threshold slope of the tunneling field effect transistor is obviously reduced, and steep minimum sub-threshold slope is kept.

Description

technical field [0001] The invention belongs to the field of CMOS ultra large scale integrated circuit (ULSI) field effect transistor logic devices, and in particular relates to a vertical channel direction heterogeneous structure tunneling field effect transistor and a preparation method thereof. Background technique [0002] Since the birth of integrated circuits, microelectronics integration technology has been developing continuously in accordance with "Moore's Law", and the size of semiconductor devices has been continuously reduced. As semiconductor devices enter the deep submicron range, traditional MOSFET devices are limited by the conduction mechanism of self-diffusion drift, and the subthreshold slope is limited by the thermoelectric potential kT / q, which cannot be reduced synchronously with the reduction of device size. As a result, the reduction of leakage current of MOSFET devices cannot meet the requirements of device size reduction, the energy consumption of t...

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Problems solved by technology

[0003] However, unlike traditional MOSFETs, the subthreshold slope in the subthreshold region of the TFET transfer curve changes and gradually increases with the increase of the gate voltage, which leads to a TFET transfer characteristic lower than 60mV / dec The corresponding range of subthreshold slope is small, and the average subthreshold slope of the device is relatively high, which is not conducive to the application of TFET devices in the field of ultra-low power consumption

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