IP hard core intellectual property protection method and device based on path delay

Abstract

The invention relates to the field of integrated circuits and aims to provide an IP hard core intellectual property protection method and device based on path delay, wherein the IP hard core intellectual property protection method and device can be used for intellectual property protection of a timing sequence logic which can be applied to input and output and needs multiple delay periods. The IP hard core intellectual property protection method and device can effectively prevent various IP core theft problems, such as a brute force attack, a cleaning attack and reverse engineering. According to the technical scheme, the IP hard core intellectual property protection method based on the path delay comprises the following steps that 1, signals need to pass through a timing sequence logic path circuit of multiple time periods from input to output; 2, a protective path is designed; 3, a designed protective circuit comprises a shifting register, a finite state machine circuit and an interconnecting line, wherein the shifting register is used for storing an initialization secret key, the finite state machine circuit is used for secrete key checking, and the signal delay of the interconnecting line is adjustable; 4, the purpose of protecting a circuit IP is achieved by adjusting and controlling the input and output delay of the protective circuit and the protected circuit. The IP hard core intellectual property protection method and device based on the path delay are mainly applied to integrated circuits.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a method for protecting IP hard core intellectual property rights based on sequential logic path delay matching. technical background [0002] Intellectual property infringement has become one of the key issues in SoC design based on IP reuse. The illegal use, duplication and dissemination of IP endanger the rights and interests of IP designers. Therefore, various methods of protecting hardware IP have emerged. [0003] Currently widely used hardware IP protection methods include encryption using encryption algorithm, hardware key protection method and hardware watermark protection method. Encryption algorithms such as AES can be used to encrypt the IP core, and only the authorized key can be decrypted and the original IP core can be extracted. The hardware key method is to lock each chip by correlating process difference characteristics and logical functions after the chip ...

AI Technical Summary

Problems solved by technology

Due to differences in the process of integrated circuit technology, the input and output responses of the same PUF on different integrated circuits are different, forming a unique ID for each circuit. However, this scheme is more vulnerable to attacks due to the unbalanced output of 0 and 1.

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