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Method for improving electrical resistivity evenness of P-type silicon epitaxial wafer for CCD

A technology of silicon epitaxial wafers and resistivity, which is applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the difficulties of P-type epitaxial layers and affect the uniformity of resistivity of epitaxial layers, etc., so as to promote the development process and improve Effect of Resistivity Uniformity

Inactive Publication Date: 2015-01-14
CHINA ELECTRONICS TECH GRP NO 46 RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Compared with the preparation of N-type silicon epitaxial layers, it is particularly difficult to grow P-type epitaxial layers with high resistivity uniformity. The effect is more serious, especially the middle and high resistance epitaxial wafers with low doping concentration are affected by the large concentration difference between the substrate and the epitaxial layer, and slight self-doping will seriously affect the resistivity uniformity of the epitaxial layer

Method used

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  • Method for improving electrical resistivity evenness of P-type silicon epitaxial wafer for CCD
  • Method for improving electrical resistivity evenness of P-type silicon epitaxial wafer for CCD
  • Method for improving electrical resistivity evenness of P-type silicon epitaxial wafer for CCD

Examples

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Effect test

Embodiment 1

[0023] Example 1: (1) First use the base silicon coating technology, the method is: use HCl gas to etch the base of the epitaxial furnace to remove the residual deposits on the base, the etching temperature is set to 1150 ° C, the purity of the HCl gas ≥99.99%, the flow rate is set to 1L / min, the etching time is set to 3min, and then the base is covered with a layer of intrinsic polysilicon, the growth material is trichlorosilane gas, the purity is ≥99.95%, and the flow rate is set to 35 g / min, the growth time was set to 10min.

[0024] (2) Put a P-type silicon substrate in the pit of the base. The silicon wafer has a crystal orientation of , a resistivity of 0.01 Ω·cm, a thickness of 450 μm, and a diameter of 100 mm. The selected silicon substrate has a shallow back damage layer on the back, and the back damage layer is coated with polysilicon and silicon dioxide to form a back seal layer, and the damage density of the back damage shallow layer is controlled at 6×10 6 piece / ...

Embodiment 2

[0033] Example 2: (1) First use the silicon-coated base technology. The method is: use HCl to etch the base of the epitaxial furnace to remove the residual deposits on the base. The etching temperature is set at 1170°C, and the purity of HCl gas is ≥ 99.99%, the flow rate is set to 1L / min, the etching time is set to 5 min, and then the base is covered with a layer of intrinsic polysilicon, the growth material is trichlorosilane gas, the purity is ≥99.95%, and the flow rate is set to 30 g / min, the growth time was set to 10min.

[0034] (2) Put a P-type silicon substrate in the pit of the pedestal. The silicon wafer has a crystal orientation of , a resistivity of 0.01 Ω·cm, a thickness of 450 μm, and a diameter of 100 mm. The selected silicon substrate has a shallow back damage layer on the back, and the back damage layer is coated with polysilicon and silicon dioxide to form a back seal layer, and the damage density of the back damage shallow layer is controlled at 6×10 6 piec...

Embodiment 3

[0043] Example 3: (1) First use the base silicon coating technology, the method is: use HCl gas to etch the base of the epitaxial furnace to remove the residual deposits on the base, the etching temperature is set to 1170 ° C, the purity of the HCl gas ≥99.99%, the flow rate is set to 1L / min, the etching time is set to 3min, and then the base is covered with a layer of intrinsic polysilicon, the growth material is trichlorosilane gas, the purity is ≥99.95%, and the flow rate is set to 35 g / min, the growth time was set to 10min.

[0044] (2) Put a P-type silicon substrate in the pit of the base. The silicon wafer has a crystal orientation of , a resistivity of 0.01 Ω·cm, a thickness of 450 μm, and a diameter of 100 mm. The selected silicon substrate has a shallow back damage layer on the back, and the back damage layer is coated with polysilicon and silicon dioxide to form a back seal layer, and the damage density of the back damage shallow layer is controlled at 6×10 6 piece / ...

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Abstract

The invention relates to a method for improving the electrical resistivity evenness of a P-type silicon epitaxial wafer for a CCD. The method includes the steps that an intrinsic layer is prepared before a needed epitaxial layer grows, so that impurities on the edges of the surface and the back face of a substrate and impurities in a furnace cavity of an epitaxial furnace are isolated from volatilizing and escaping to the needed epitaxial layer; meanwhile, the harmful impurities adsorbed to the surface is resolved by increasing temperature, the impurities in a reaction furnace cavity are removed out through continuously-changed air flow, a passive doping source is effectively restrained, then the needed parameter epitaxial layer grows, and therefore the epitaxial layer with the high electrical resistivity evenness is acquired. According to the method, the substrate covered silicon technology, the two-step epitaxial growth technology and the temperature and flow change blowing technology are organically combined, parameters of the prepared silicon epitaxial wafer can meet the requirements of a substrate material of the large-area-array and high-integration-density CCD, the electrical resistivity evenness of the epitaxial wafer can be higher than 99%, and the research process of the high-performance CCD is greatly promoted.

Description

technical field [0001] The invention relates to a preparation technology of semiconductor materials, in particular to a method for improving the resistivity uniformity of a P-type silicon epitaxial sheet for a CCD device. Background technique [0002] As a photoelectric coupling device, CCD has the functions of photoelectric conversion, signal storage and signal transmission. It has been widely used in advanced digital cameras, monitors and camcorders. It is indispensable in the fields of aerospace, space image transmission, and weapon guidance. imaging device. Silicon epitaxial wafer is the key basic material for making large area array and highly integrated CCD devices. CCD devices have extremely high requirements on the uniformity of resistivity of silicon epitaxial wafers. At present, the general requirement for resistivity uniformity should not be less than ≥97%. The uniformity of resistivity directly determines the reliability of the output voltage of the device. Poo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02
CPCH01L21/0262H01L21/02532H01L27/148
Inventor 王文林李扬薛兵李明达
Owner CHINA ELECTRONICS TECH GRP NO 46 RES INST
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