Device and method for controlling sar receiving queue buffer in otn packet switching system

Abstract

The invention discloses a control device and method for SAR receiving queue buffering in an OTN packet switching system, and relates to the communication field. The packet delay flow control module and the hardware data flow control module connected to the switching module, the packet delay flow control module includes the hardware packet delay flow control time register Pdv_time, the hardware packet delay flow control request register Pdv_req, and the hardware data flow control module includes the hardware data flow control Enable register ILK_EN, hardware start flow control watermark register ILK_START, hardware close flow control watermark register ILK_END. The invention can effectively stabilize the variation range of the buffer capacity of the SAR receiving queue and reduce the chip design cost; effectively restore the output envelope of the slice module at the recombination end, reduce the impact on the lower-level buffer, and ensure the stability of the entire packet switching system.

Description

technical field [0001] The invention relates to the communication field, in particular to a control device and method for SAR receiving queue buffering in an OTN packet switching system. Background technique [0002] OTN (Optical Transport Network, Optical Transport Network) technology has gradually become one of the mainstream technologies in the field of optical communication in recent years. see figure 1 As shown, the OTN packet switching system includes an OTN ingress module, a slice (Segment) module, a packet switching (Fabric) module, a reassembly (Regenerate) module and an OTN egress module connected in sequence. The OTN entry module is an OTUk (Optical channel Transport Unit-k, optical channel transmission unit k, k=0, 1, 2, 3) channel transmission unit, used to output high-order ODUk (Optical channel Data Unit-k, optical channel Data unit, k=0, 1, 2, 3) data flow. The slicing module divides the high-order and low-order data streams into SAR (Segment And Regenerat...

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Problems solved by technology

[0003] The SAR packet data cache FIFO (First Input First Output) output by the recombination module receiving the packet switching module is called the SAR receiving queue cache. After the SAR packet is transmitted by the packet switching module, its delay time is unstable, that is, The change of the transmission delay of SAR packets by the packet switching module in the OTN packet switching system is not fixed and unknown, while the data flow rate of ODUK is fixed and uniform. In order to ensure the correctness of the reassembled data flow, the SAR receiver must be set Queue cache and ensure that no overflow occurs. If only relying on expanding the receiving queue cache capacity, it will cause a great waste of hardware resources, and cannot fundamentally solve the jitter of SAR transmission delay, and cannot fundamentally guarantee the reliability of the recombined data system sex

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