ESD self-protection device with LDMOS-SCR structure and high in holding current and robustness

Abstract

An ESD self-protection device with an LDMOS-SCR structure and high in holding current and robustness can be used for an on-chip IC high-voltage ESD self-protection circuit. The ESD self-protection device is mainly formed by a P substrate, a P trap, an N trap, a first P+ injection region, a first N+ injection region, a second P+ injection region, a third P+ injection region, a second N+ injection region, a first field oxide isolation region, a thin gate oxide layer, a second field oxide isolation region, a third field oxide isolation region, a fourth field oxide isolation region and a polysilicon gate. According to the ESD self-protection device with the LDMOS-SCR structure, the parasitic LDMOS-SCR structure and an ESD current discharging path with two diodes connected with an LDMOS conducting channel can be formed respectively under the high-voltage ESD pulse effect, an ESD current is discharged rapidly, the holding current and a failure current after device trigger hysteresis are improved, the ESD robustness of the device is enhanced, and the ESD self-protection device is suitable for ESD self-protection of the high-voltage circuit.

Description

technical field [0001] The invention belongs to the field of electrostatic discharge protection of integrated circuits, and relates to a high-voltage ESD protection device, in particular to an ESD self-protection device with an LDMOS-SCR structure with high sustain current and strong robustness, which can be used to improve on-chip IC high-voltage ESD protection reliability. Background technique [0002] With the continuous development of power integration technology, the application range of power integrated circuits (IC) is becoming wider and wider. Lateral double diffused insulated gate field effect transistor (LDMOS) is an indispensable power device that developed rapidly at the end of the last century. It is widely used in high-voltage and high-power circuit systems such as DC power supplies, motor drives, and automotive electronics. However, with the rapid development of semiconductor power integration technology, in engineering application practice, power integrated ...

AI Technical Summary

Problems solved by technology

[0004] Aiming at the common problems of weak ESD robustness and insufficient latch-up resistance in existing high-voltage ESD protection devices, an example of the present invention designs an ESD self-protection with a strong robustness LDMOS-SCR structure with high holding current The device not only makes full use of the characteristics of LDOMS devices that can withstand high voltage breakdown, but also utilizes the specially designed layout levels of P+ implantation, N well, P well and N+ implantation to make the device form an SCR under the action of high voltage ESD pulses. Structured ESD current discharge path to improve secondary failure current

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