Silicon substrate air-impermeability sealing structure and manufacturing method thereof

Abstract

The invention discloses a silicon substrate air-impermeability sealing structure and a manufacturing method thereof. The sealing structure comprises a silicon substrate provided with a complete through hole filled with first metal, the surface of the silicon substrate is passivated, and the back face of the silicon substrate is provided with a bonding pad. The front face of the silicon substrate is filled with a polymer dielectric layer provided with an opening which is filled with second metal. The upper surface of the polymer dielectric layer is provided with a metal wiring layer and an insulating layer. The second metal wiring layer and the second metal are in contact to form electric connection. A chip is mounted on the upper surface of a second insulating layer. A pin of the chip is electrically connected with the second metal wiring layer through a bonding wire, and the second metal wiring layer and the second metal are in direct contact to form electric connection. The second metal and the first metal are in direct contact to form electric connection. A cover plate and the silicon substrate are sealed together through sealing materials to form a cavity. The silicon substrate air-impermeability sealing structure and the manufacturing method thereof can effectively reduce the packaging size, improve structural strength, and simplify the production technology.

Description

technical field [0001] The invention relates to a silicon-based airtight sealing structure and a manufacturing method thereof, belonging to the technical field of integrated circuit packaging. Background technique [0002] Through-silicon via technology (TSV) is currently the main development direction of integrated circuits. Because of its excellent high-frequency characteristics, it can reduce transmission delay, reduce noise, small package size, and high thermal expansion reliability. Also wider. [0003] Through-silicon via technology (TSV) is limited by equipment capabilities, especially the sidewall insulating layer and barrier layer sputtering of high-aspect-ratio through-holes is quite difficult. For this reason, the industry usually makes the silicon substrate relatively thin for later The through-hole filling process; and for the sake of structural strength, the pitch of the through-holes is generally set larger. Moreover, due to the thin thickness of this type o...

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Problems solved by technology

Moreover, due to the thin thickness of this type of silicon substrate and the large pitch between vias, the practical application of TSV technology is limited, resulting in large package size and poor structural strength of this type of structure. Many research results can only be applied in the laboratory. , which cannot meet the packaging requirements of small-sized, multi-terminal integrated circuits

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