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Wafer-level fingerprint recognition chip packaging structure and method

A fingerprint recognition and chip packaging technology, applied in character and pattern recognition, acquisition/organization of fingerprints/palmprints, measurement devices, etc., can solve the problems of high sensitivity requirements of fingerprint recognition chips, manufacturing and application limitations of fingerprint recognition devices, etc. Meet the requirements of reducing sensitivity, simplify the packaging process, and reduce damage

Inactive Publication Date: 2014-12-10
CHINA WAFER LEVEL CSP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the existing fingerprint identification devices, the sensitivity of the fingerprint identification chip is required to be high, which limits the manufacture and application of fingerprint identification devices.

Method used

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  • Wafer-level fingerprint recognition chip packaging structure and method
  • Wafer-level fingerprint recognition chip packaging structure and method
  • Wafer-level fingerprint recognition chip packaging structure and method

Examples

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Embodiment Construction

[0050] As mentioned in the background, in the existing fingerprint identification devices, the sensitivity of the fingerprint identification chip is required to be high, so that the manufacture and application of the fingerprint identification devices are limited.

[0051] After research, please continue to refer to figure 1 , the surface of the fingerprint identification chip 101 is covered with a glass substrate 102, the glass substrate 102 is used to protect the fingerprint identification chip 101, and the user's finger 103 is directly in contact with the glass substrate 102, therefore, in order to ensure that the glass substrate 102 has For sufficient protection capability, the thickness of the glass substrate 102 is relatively thick. However, since the glass substrate 102 is relatively thick, the fingerprint recognition chip 101 is required to have high sensitivity to ensure that the user's fingerprint can be accurately extracted. However, it is difficult to manufacture ...

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Abstract

Disclosed is a wafer-level fingerprint recognition chip packaging structure and method. The method includes: providing a substrate which comprises a plurality of induction chip areas and is provided with a first surface and a second surface opposite to the first surface, wherein a first surface of each induction chip area comprises an induction area; forming a covering layer on the first surface of the substrate; forming a plug structure in each induction chip area of the substrate, wherein one end of each plug structure is electrically connected with the corresponding induction area, and the other end of each plug structure is exposed out of the second surface of the substrate. By the forming method, the packaging process of a fingerprint recognition chip can be simplified, the requirement on sensitivity of the induction chip is lowered, and the packaging method is wider in application.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer-level fingerprint identification chip packaging structure and a packaging method thereof. Background technique [0002] With the progress of modern society, the importance of personal identification and personal information security has gradually attracted people's attention. Due to the uniqueness and invariance of human fingerprints, fingerprint identification technology has the characteristics of good security, high reliability, and simple and convenient use, making fingerprint identification technology widely used in various fields to protect personal information security. With the continuous development of science and technology, the information security of various electronic products has always been one of the key points of technological development. Especially for mobile terminals, such as mobile phones, notebook computers, tablet computers, dig...

Claims

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Application Information

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IPC IPC(8): H01L21/56H01L21/60H01L23/31H01L23/48G06K9/00
CPCH01L21/561H01L21/563H01L23/3128H01L23/481H01L24/80H01L24/94G06V40/13H01L2224/11H01L23/3114G06V40/1306H01L23/48H01L21/56G01D11/245
Inventor 王之奇喻琼王蔚
Owner CHINA WAFER LEVEL CSP
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