Eight-transistor static random access memory unit

Abstract

The invention provides an eight-transistor static random access memory unit which at least comprises a first phase inverter, a second phase inverter and a transmission gate. The first phase inverter is composed of a first PMOS transistor and a first NMOS transistor. The second phase inverter is composed of a second PMOS transistor and a second NMOS transistor. The transmission gate is composed of a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor and a sixth NMOS transistor. The first PMOS transistor, the first NMOS transistor, the second PMOS transistor and the second NMOS transistor are all of source body ohmic contact body leading-out structures. According to the eight-transistor static random access memory unit, heavy doping with the same polarity as the polarity of a body area is carried out on a source region of each transistor, the ohmic contact between the source regions and the body regions is achieved, the floating body effects of partial used-up SOI transistors are eliminated, the processes and the domain are not required to be additionally increased, and the high integration density of the unit is ensured. The eight-transistor static random access memory unit is compatible with a conventional CMOS process and suitable for industrial production.

Description

technical field [0001] The invention belongs to the technical field of memory design and manufacture, in particular to an eight-transistor static random access memory unit. Background technique [0002] Memory is divided into flash memory (Flash), dynamic random access memory (DRAM) and static random access memory (SRAM), among which static random access memory (SRAM) has become the first choice for key system storage modules because of its fast read and write and no need for periodic refresh. Such as the cache between the CPU and the main memory. In some high-performance CPUs, the L3 cache composed of SRAM has already accounted for about half of the total chip area. The eight-transistor SRAM cell is one of the currently commonly used SRAM cells, which is composed of a pair of inverters and four pass-gate transistors. The word line controls the switching of the two transfer gate transistors, and the stored data is written or read through the bit line. When designing an ei...

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Problems solved by technology

This will greatly reduce the integration level of the whole chip

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