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Motion compensation structure in multimode video decoder

A technology of motion compensation and video coding, which is applied in the field of multimedia video, can solve the problems of image quality loss, high bandwidth demand, and failure to propose a solution, so as to reduce bandwidth demand, reduce burst length, improve access efficiency and circuit The effect of throughput

Inactive Publication Date: 2013-05-15
深圳市德赛微电子技术有限公司
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Problems solved by technology

[0003] Previous high-efficiency motion compensation circuits for H.264 / AVC all adopted a motion compensation structure based on a 4x4 fixed block size, and proposed a complex data reuse strategy and scheduling strategy to overcome the motion compensation based on a 4x4 block size. The defects brought about by these new strategies lead to the need for more on-chip memory and complex control logic to support these new strategies. At the same time, different hardware interpolation circuits are used for the brightness component and the chrominance component; the previous structure can support H.264 at the same time / AVC and AVS luma interpolation structure, but does not support chroma interpolation, and does not support other standards; some structures mainly focus on the design and implementation of motion compensation subsystem (including motion vector prediction, etc.) in multi-standard decoders, However, it does not include a detailed description of the motion compensation interpolation structure; some work proposes to use a new 4-stage directed FIR filter to replace the original 6-stage filter in the H.264 / AVC standard to solve the original interpolation The irregularity of the method and the problem of excessive bandwidth requirements, but it introduces a serious loss of image quality, and at the same time fails to propose a solution suitable for multiple standards

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Embodiment Construction

[0021] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0022] The new multi-standard and efficient motion compensation structure provided by the present invention, based on the proposed RL (Rounding Last) strategy and DTS (Diagonal Two Step) strategy, proposes a new unified interpolation suitable for multi-standard motion compensation Method structure, and based on this algorithm, a reconfigurable motion compensation hardware structure is designed.

[0023] 1. Propose simplified RL strategy and DTS strategy in the present invention, in RL strategy will ignore the non-linear rounding operation and saturation limit operation in the middle interpolation process of 1 / 4 pixel point; In DTS strategy, diagonal The quarter pixel of the line is completed by a two-step interpolation pr...

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Abstract

The invention relates to a modified novel interpolation method structure which is appropriate for multi-standard motion compensation. A motion compensation structure in a multimode video decoder is based on a Rounding Last (RL) strategy and a Diagonal Two Step (DTS) strategy which are provided by the invention. The novel interpolation method used by the motion compensation structure in the multimode video decoder has more regular data dependence relationship and a uniform two-step interpolation structure is applied, interpolation values of the luminance component and the chromaticity component in various standards are effectively compatible. Based on the novel method, a multi-standard motion compensation hardware circuit capable of being reconfigured is achieved. The multi-standard motion compensation hardware circuit capable of being reconfigured adopts the motion compensation structure based on the size of a variable-block. The motion compensation structure comprises five reconfigurable 8-grade finite impulse response (FIR) filters. Implementation results show that by means of the motion compensation structure in the multimode video decoder, bandwidth requirements are reduced by 27%-50%, the average burst length of accessing an external memory once is improved by 1.22 times-2.25 times, under the technology of 0.18 micrometer, the circuit only comprises 45.8K equivalent logic gates and 384-byte on-chip storage, under the worst condition, processing of a macro block needs about 520 periods, and under the operating frequency of 125MHZ, the motion compensation structure in the multimode video decoder can meet real-time decoding requirements of complete high definition 1080p (1920*1080) 30 frames per second.

Description

technical field [0001] The invention is applicable to the technical field of multimedia video, especially in the aspect of compatible multi-standard video decoding, and satisfies the decoding requirement of high-definition video on the basis of low power consumption. Background technique [0002] Motion compensation technology improves the efficiency of video coding by eliminating temporal redundancy between adjacent frames. In the latest video coding standards, motion compensation introduces many new coding techniques, including variable block size, multiple reference frames, bidirectional prediction, unrestricted motion vectors, and quarter-precision interpolation, etc. All these new technologies can improve the efficiency of video coding, but at the same time greatly increase the computational requirements and bandwidth requirements of motion compensation. In the basic level of H.264 / AVC, motion compensation occupies 25% of the total decoding time and 50% of the total ba...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/26H04N7/46H04N19/59
Inventor 石伟
Owner 深圳市德赛微电子技术有限公司
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