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Manufacturing technique of low-voltage chip and low-voltage chip thereof

A production process and chip technology, which is applied in the field of chip production and preparation, can solve problems such as large leakage, conduction, and product failure of low-voltage chips, and achieve the effects of increasing the diffusion gradient, reducing the depletion layer, and reducing the leakage value

Active Publication Date: 2013-05-15
ZIBO CHENQI ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, the leakage current of low-voltage chips is large, and it is difficult to meet the increasingly stringent requirements of customers for this parameter. For example, the leakage current of a transient suppression diode chip with a voltage of 6.8V cannot be measured by its working voltage within 20UA.
In order to meet the requirements of low leakage, some adopt the method of shallow junction diffusion, but this makes it easy to conduct with the P / N junction during the process of metal and silicon alloy, resulting in product failure
The existing low-voltage chip production adopts a low-temperature oxidation process that cannot meet the thickness of the oxide layer, cannot achieve the purpose of passivation, and cannot be used freely in the packaging process
Low-voltage diffusion cannot meet the requirements of surge and VC when the junction depth is above 23UM
The cleaning and protection of the P / N junction of the mesa process is very important. Due to the limitation of the environment and process conditions, the cleanliness of the existing process is difficult to meet the technical requirements

Method used

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  • Manufacturing technique of low-voltage chip and low-voltage chip thereof

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Embodiment 1

[0031] A production process for a low-voltage chip, comprising the following steps:

[0032] (1) Select P-type original silicon wafer: select P-type original silicon wafer with a resistivity of 0.002 ohm / cm and a thickness of 290 microns;

[0033] (2) Pretreatment before boron impurity diffusion: first, place the P-type raw silicon wafer selected in step (1) in a mixed acid composed of nitric acid, hydrofluoric acid and glacial acetic acid at a temperature of 1-3°C. Carry out chemical etching for 30 seconds, wherein the volume ratio of nitric acid: hydrofluoric acid: glacial acetic acid is 18:1:1; then the P-type original silicon wafer is rinsed in pure water and placed in a hydrogen peroxide, ammonia and water ratio. Heat up the prepared No. 1 solution to wash the P-type raw silicon wafer at 80°C for 10 minutes, wherein the volume ratio of hydrogen peroxide: ammonia water: water is 1:1:6; rinse with water after cleaning in No. 1 solution Clean, and then place the P-type raw ...

Embodiment 2

[0046] A production process for a low-voltage chip, comprising the following steps:

[0047] (1) Select P-type original silicon wafer: select P-type original silicon wafer with a resistivity of 0.0037 ohm / cm and a thickness of 340 microns;

[0048] (2) Pretreatment before boron impurity diffusion: first, place the P-type raw silicon wafer selected in step (1) in a mixed acid composed of nitric acid, hydrofluoric acid and glacial acetic acid at a temperature of 1-3°C. Carry out chemical etching for 30 seconds, wherein the volume ratio of nitric acid: hydrofluoric acid: glacial acetic acid is 18:1:1; then the P-type original silicon wafer is rinsed in pure water and placed in a hydrogen peroxide, ammonia and water ratio. Heating in the prepared No. 1 solution, and cleaning the P-type raw silicon wafer at 95°C for 10 minutes, wherein the volume ratio of hydrogen peroxide: ammonia water: water is 1:1:6; rinse with water after cleaning in No. 1 solution Clean, and then place the P...

Embodiment 3

[0061] A production process for a low-voltage chip, comprising the following steps:

[0062] (1) Select P-type original silicon wafer: select P-type original silicon wafer with a resistivity of 0.0035 ohm / cm and a thickness of 310 microns;

[0063] (2) Pretreatment before boron impurity diffusion: first, place the P-type raw silicon wafer selected in step (1) in a mixed acid composed of nitric acid, hydrofluoric acid and glacial acetic acid at a temperature of 1-3°C. Carry out chemical etching for 30 seconds, wherein the volume ratio of nitric acid: hydrofluoric acid: glacial acetic acid is 18:1:1; then the P-type original silicon wafer is rinsed in pure water and placed in a hydrogen peroxide, ammonia and water ratio. Heating in the prepared No. 1 liquid to heat up the P-type raw silicon wafer at 90°C for 10 minutes, wherein the volume ratio of hydrogen peroxide: ammonia water: water is 1:1:6; rinse with water after cleaning in No. 1 liquid Clean, and then place the P-type r...

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Abstract

The invention belongs to the technical field of chip manufacturing and preparation, and particularly relates to a manufacturing technique of a low-voltage chip and the low-voltage chip thereof. The manufacturing technique comprises the following steps: (1), a P-shaped primary silicon slice is selected; (2) boron impurities are pre-processed before spreading; (3) the boron impurities are spread; (4) crystal separation and cleaning are conducted; (5) phosphorus impurities are spread; (6) crystal separation and cleaning are conducted; (7) table board processing is conducted; (8) cleaning is conducted before passivation; (9) sodion is cleaned; (10) glass is passivated; and (11) a finished product is manufactured. The manufacturing technique is simple and easy to operate. The low-voltage chip manufactured by the manufacturing technique is low in leakage value and capable of meeting the requirement of low leakage.

Description

technical field [0001] The invention belongs to the technical field of chip production and preparation, and in particular relates to a low-voltage chip production process and the low-voltage chip. Background technique [0002] At present, the low-voltage chip has a large leakage current, and it is difficult to meet the increasingly stringent requirements of customers for this parameter. For example, the leakage current of a transient suppression diode chip with a voltage of 6.8V cannot be measured by its operating voltage within 20UA. In order to meet the requirements of low leakage, some adopt the method of shallow junction diffusion, but this makes it easy to conduct with the P / N junction during the process of metal and silicon alloying, resulting in product failure. The existing low-voltage chip production adopts a low-temperature oxidation process that cannot meet the thickness of the oxide layer, cannot achieve the purpose of passivation, and cannot be used freely in th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/329H01L21/02H01L21/56H01L29/06H01L23/29H01L29/861
Inventor 陈思太盛春芳
Owner ZIBO CHENQI ELECTRONICS
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