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Method for producing metal plug for metal gate

A metal gate and metal plug technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc.

Active Publication Date: 2015-02-18
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, in the dry etching process, the barrier layer above the active region is also etched simultaneously, penetrating through the barrier layer above the active region, causing damage to the active region, and ultimately leading to a decrease in the performance of the fabricated semiconductor device
In order to overcome this problem, the sputtering amount of argon molecules used in dry etching can be reduced to prevent the penetration of the barrier layer when etching the barrier layer above the active area, but if the amount of argon molecules used in dry etching is reduced If the amount of sputtering is large, the metal gate oxide layer in the metal plug via hole of the metal gate cannot be completely removed, which reduces the performance of the final semiconductor device.

Method used

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  • Method for producing metal plug for metal gate
  • Method for producing metal plug for metal gate
  • Method for producing metal plug for metal gate

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Embodiment Construction

[0038] In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0039] It can be seen from the background technology that in order to make the metal plug of the metal gate in the back-end process connect to the metal gate, it is necessary to oxidize the metal gate during the process of making the metal plug of the metal gate. Layer removal is carried out by dry etching, and the material used is argon molecules, that is, argon molecules are used to sputter on the surface of the semiconductor CMOS device in the reaction chamber. In order to remove completely, the dose of argon molecules used should not be too small. However, while removing the oxide layer on the metal gate, the relatively large dose of argon molecules will also sputter the barrier layer above the active region, penetrating Through the barrier layer ...

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Abstract

The present invention discloses a method for producing a metal plug for a metal gate. When a metal gate oxide layer in the metal plug through hole of the metal gate is removed by using a dry method, small sputtering dose argon molecule sputtering and hydrogen reduction are combined to perform the remove. The small dose ensures that a barrier layer is not penetrated during the etching of the barrier layer on an active region; so, on the one hand, the barrier layer on an active region is not etched to get penetrated by using a small sputtering dose argon molecules for sputtering; on the other hand, the portion of the metal gate oxide layer in the metal plug through hole of the metal gate which cannot be completely removed, is reduced by using hydrogen reduction; thereby enabling the metal plug though hole of the metal gate to communicate with the metal gate, finally the metal plug filled in the metal plug hole of the metal gate can also be connected to the metal gate. Accordingly, by using the method of the present invention, it is ensured that the produced metal plug of the metal gate is enabled to connect with the metal gate on the basis of not damaging the active region of a semiconductor.

Description

technical field [0001] The invention relates to a manufacturing technology of a semiconductor device, in particular to a method for manufacturing a metal plug of a metal gate. Background technique [0002] Currently, the semiconductor manufacturing industry mainly grows devices, such as complementary metal-oxide-semiconductor (CMOS) devices, on the wafer device side of a silicon substrate. Nowadays, the double-well CMOS process is commonly used to simultaneously fabricate p-channel metal oxide semiconductor field effect transistors (MOSFETs) with conduction channels as holes and n-channel MOSFETs with conduction channels as electrons on silicon substrates. The specific steps It is: firstly, after doping different regions of the silicon substrate into the (n-type) silicon substrate with electrons as the majority carrier and the (p-type) silicon substrate with holes as the majority carrier , make a shallow trench isolation (STI) 101 between the n-type silicon substrate and t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/283
Inventor 黄晓辉王新鹏
Owner SEMICON MFG INT (SHANGHAI) CORP
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