Longitudinally-conductive GaN (gallium nitride)-substrate MISFET (metal insulated semiconductor field-effect transistor) device and manufacturing method thereof
A conduction and vertical technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as the reduction of two-dimensional electron gas concentration, the impact of device conduction performance, and the reduction of channel mobility, so as to improve Reliability and repeatability, reduced on-resistance, effect of low on-resistance
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Embodiment 1
[0040] Such as Figure 11 Shown is a schematic diagram of the device structure of this embodiment, including a gate 10, a source 8, a drain 9, an insulating layer 7, a conductive GaN substrate 1 and an epitaxial layer thereon, and the epitaxial layer includes a first n-type light Doped GaN layer 2, secondary growth mask dielectric layer 3, non-doped GaN layer 4 and heterostructure barrier layer 5, the middle part of the non-doped GaN layer 4 forms a groove for realizing gate conduction The surface of the channel 12, the grooved channel 12 and the heterostructure barrier layer 5 is covered with an insulating layer 7, the gate 10 is covered at the grooved channel 12 on the insulating layer, and the two ends of the insulating layer 7 are etched to form a source region , ohmic metal is evaporated on the source region to form the source 8 in contact with the heterostructure barrier layer 5, and the drain 9 is placed on the back of the conductive GaN substrate.
[0041] The fabrica...
Embodiment 2
[0053] Such as Figure 14 It is a schematic diagram of the device structure of this embodiment, which is similar to that of Embodiment 1, except that after the secondary growth mask dielectric layer 3 is etched, a P-type GaN layer 11 is first grown in the groove area until When the growth is close to the height of the insulating dielectric mask layer on both sides, such as Figure 12 As shown, the growth conditions are switched immediately to grow the non-doped GaN layer 4, as shown in Figure 13 shown. This will effectively improve the conduction voltage of the vertical channel and increase the threshold voltage of the entire device.
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