Double-drain type CMOS magnetic field induction transistor and fabricating method thereof

Abstract

The invention discloses a double-drain type CMOS (Complementary Metal-Oxide-Semiconductor) magnetic field induction transistor and a fabricating method thereof. The double-drain type CMOS magnetic field induction transistor comprises a P type substrate, two n+ drain doped region, an n+ source doped region, a p+ substrate contact doped region, a polycrystalline silicon gate and a silicon dioxide oxide layer. The method comprises the following steps of: firstly, growing the silicon dioxide oxide layer and the polycrystalline silicon gate on the P type substrate; and secondly, generating a source n+ heavily doped region and a drain n+ heavily doped region and the p+ substrate contact doped region on the two sides of the polycrystalline silicon gate, wherein the drain n+ heavily doped region is divided into two same regions having a certain distance therebetween. The double-drain structure is capable of realizing induction to a magnetic field under the action of the magnetic field to current carriers in an inversion layer formed under the transistor and is completely compatible with standard CMOS process; and simultaneously, compared with a magnetic sensor of a hall disc structure, the double-drain type CMOS magnetic field induction transistor is lower in power consumption.

Description

technical field [0001] The invention relates to a CMOS magnetic field sensor transistor, in particular to a CMOS magnetic field sensor transistor with a double-drain type magnetic field induction transistor structure and a manufacturing method thereof. Background technique [0002] The Hall effect has been widely used in the design of magnetic field sensors, especially for integration with standard CMOS processes. A common practice at present is to use the CMOS Hall plate structure, that is, to let the bias current pass through a square semiconductor material (such as an N-well resistor). When a magnetic field is applied vertically to the semiconductor surface, a voltage difference will be generated on both sides of the semiconductor, thereby The induction to the magnetic field is realized. However, in order to obtain greater sensitivity to magnetic field sensing, the CMOS Hall plate needs to provide a greater bias current, so the power consumption is relatively large. In ...

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Problems solved by technology

However, in order to obtain greater sensitivity to magnetic field sensing, the CMOS Hall plate needs to provide a greater bias current, so the power consumption is relatively large

In addition, the structure of the Hall disk is relatively complex, which is not conducive to the realization of a large-scale magnetic field induction array system

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