Manufacturing method of mechanical uniaxial strain GeOI (germanium-on-insulator) wafer based on SiN buried insulating layer

Abstract

The invention discloses a manufacturing method of a mechanical uniaxial strain GeOI (germanium-on-insulator) wafer based on an SiN buried insulating layer, which comprises the following steps: 1) putting a GeOI wafer on a cambered bending table, wherein the top layer (Ge layer surface) of the GeOI wafer faces up or down; 2) respectively horizontally putting two cylindrical stainless steel pressure bars on both ends of the GeOI wafer, wherein the two cylindrical stainless steel pressure bars are respectively 1cm away from the edge of the GeOI wafer; 3) slowly rotating a screw cap which connects the pressure bars, so that the GeOI wafer is gradually bent along the cambered table until the GeOI wafer is completely laminated on the cambered table; 4) putting the cambered bending table carrying the GeOI wafer in an annealing furnace, and carrying out annealing; 5) after the annealing finishes, slowly cooling to room temperature, and taking out the cambered bending table carrying the GeOI wafer; and 6) rotating the screw cap which connects the pressure bars, and slowly elevating the pressure bars until the bent GeOI wafer restores to the original state. The invention has the advantages of 1) simple manufacturing technique, 2) fewer manufacturing devices, 3) wide annealing temperature range, 4) high strain effect, 5) favorable thermal properties and 6) low manufacturing cost.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and relates to a manufacturing process technology of semiconductor materials. Specifically, it is a new method for fabricating uniaxially strained GeOI (Germanium On Insulater, germanium on insulating layer) wafers on SiN (silicon nitride) buried insulating layers, which can significantly enhance the electron mobility and void space of GeOI wafers. Hole mobility to improve the electrical and optical properties of GeOI devices and integrated circuits. Background technique [0002] The electron and hole mobility of the semiconductor Ge is 2.8 times and 4.2 times that of Si, respectively, and its hole mobility is the highest among all semiconductors. Similar to strained Si, the carrier mobility of strained Ge is also greatly improved, and the hole mobility of buried-channel strained Ge can be increased by 6-8 times. Therefore, Ge and strained Ge will be the best channel materials for Si-b...

AI Technical Summary

Problems solved by technology

[0012] The main disadvantages of this technology are: 1) the process steps are complex: the method must undergo thermal oxidation, H + Ion implantation, stripping annealing and other essential processes and related steps

3) Long production cycle: additional thermal oxidation, H + Process steps such as ion implantation and stripping annealing increase the time of its fabrication

4) Low yield: This method is to use two overlapping silicon wafers for mechanical bending and bonding, and to perform high-temperature peeling in the bent state, and the silicon wafers are easily broken

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