PMOS (p-channel metal-oxide-semiconductor field-effect transistor) source/drain region ion implantation method and corresponding device manufacturing method

Abstract

The invention discloses a PMOS (p-channel metal-oxide-semiconductor field-effect transistor) source / drain region ion implantation method and a corresponding device manufacturing method. Since an amorphous carbon layer can be completely removed without causing silicon sinking, when the amorphous carbon layer is used as a pad layer for PMOS source / drain region ion implantation, the range of implanted impurities in the silicon substrate can be reduced on the premise of basically not changing the implanted impurity distribution, thereby obtaining an ultrashallow junction which is more shallow than that obtained by a conventional method; or the implanted energy is increased on the premise of keeping the depth of the ultrashallow junction unchanged, thereby relieving the demands of technique for high-dose low-energy ion implantation to some extent, and lowering the technical difficulty of PMOS source / drain region ion implantation. The PMOS source / drain region ion implantation method and the corresponding device manufacturing method provided by the invention can be used for improving the ion implantation technique of the ultrashallow junction in the PMOS source / drain region, and lowering the technical difficulty.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a PMOS source-drain region ion implantation method and a corresponding device manufacturing method. Background technique [0002] With the rapid development of semiconductor manufacturing technology, in order to achieve high integration, the size of semiconductor devices is constantly shrinking. In the manufacturing process of P-channel metal-oxide-semiconductor (PMOS) devices and complementary metal-oxide-semiconductor (CMOS) devices, due to the continuous shrinking of the device size, the requirements for the junction depth of the source and drain regions are becoming shallower and shallower, and the energy of ion implantation The requirements are lower and lower, and the dose of ion implantation is higher and higher, which makes the ion implantation process for forming the ultra-shallow junction of the source and drain regions more complicated. [0003] In the deep ...

AI Technical Summary

Problems solved by technology

However, with the further shrinking of the process size, in the process of 65nm and below, the uneven thickness of the sidewall etching residual film will lead to the uneven depth of the ultra-shallow junction, so the simple silicon surface is usually used to form the ultra-shallow junction

Images