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Device for measuring clearance between mask and silicon chip and leveling mask and silicon chip in nanolithography

A nano-lithography and leveling device technology, which is applied in the photolithography exposure device, micro-lithography exposure equipment, optics, etc., to achieve the effects of overcoming system error factors, facilitating optical path adjustment, and strong practicability

Inactive Publication Date: 2011-01-19
INST OF OPTICS & ELECTRONICS - CHINESE ACAD OF SCI
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

Its main idea is to calculate the amount of gap change directly based on the movement or phase change of the interference fringe, aiming to explain the physical principle mechanism and preliminary implementation method strategy of gap measurement; however, in this patent application, the mask and the Two sets of marking gratings on the silicon wafer are used for gap measurement, and the influence of the lateral movement of the silicon wafer on the measurement cannot be avoided

Method used

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  • Device for measuring clearance between mask and silicon chip and leveling mask and silicon chip in nanolithography
  • Device for measuring clearance between mask and silicon chip and leveling mask and silicon chip in nanolithography
  • Device for measuring clearance between mask and silicon chip and leveling mask and silicon chip in nanolithography

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Embodiment Construction

[0026] Such as figure 1 As shown, the plane wave light source with a wavelength of 633nm emitted by the light source laser tube 1 is vertically incident on two groups of adjacent first marking gratings 5 ​​and second marking gratings 6 located in the marking area on the mask 3 after passing through the reflector 2; The diffracted light B transmitted by the first marking grating 5 1 After propagating between the mask and the silicon wafer, and reflected by the surface of the silicon wafer 4 at an angle θ 1 Returning to the surface of the second marking grating 6, with another beam directly from the second marking grating 6 at an angle θ 2 Returned reflected diffracted light B 2 Two beams interfere when they meet on the marked surface, and the two beams of interfering light B 1 and B 2 After being reflected by the mirror 7, it turns back to the horizontal direction and is received by the objective lens 8, so that the interference fringes are recorded by the CCD detector 9 lo...

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Abstract

The invention discloses a device for measuring clearance between a mask and a silicon chip and leveling the mask and the silicon chip in nanolithography, which is characterized in that a monochromatic plane wave emitted by a light-source laser tube is reflected by a first reflector and then perpendicularly injected into a first mark grating and a second mark grating in a mask marking area, a diffraction light beam B1 transmitted from the first mark grating and reflected by the surface of the silicon chip and a diffraction light beam B2 directly reflected from the second mark grating are deflected by a second reflector and then received by an object glass, and finally converged to the image surface of the object glass and perform two-beam interference, the interference fringes are recorded by a CCD detector, and the clearance measurement & control is realized according to the moving situations of the fringes and the change situations of phases. The invention has the advantages of high measuring sensitivity and strong practical applicability, and has an important significance to the related fields of mask-silicon chip leveling and clearance measurement & control.

Description

technical field [0001] The invention relates to a device for measuring and leveling the silicon chip gap of a nano-lithography mask, and belongs to the related fields of micro-nano processing and optical measurement. Background technique [0002] With the research and development of highly integrated circuits and related devices, as well as the rapid development of nanotechnology and the continuous shrinking of the feature size of nano-devices, the feature size of IC is getting smaller and smaller, which greatly promotes the development of high-resolution nanolithography technology, such as Nanoimprint, zone plate array imaging lithography. Correspondingly, with the improvement of resolution and the adoption of large-size silicon wafers, the gap control and measurement of mask silicon wafers will become a severe challenge for nanolithography, and the gap measurement accuracy must be greatly improved accordingly. In the projection lithography system, the improvement of the r...

Claims

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Application Information

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IPC IPC(8): G03F9/00G03F7/20
Inventor 周绍林胡松唐小萍赵立新杨勇陈旺富徐峰陈明勇
Owner INST OF OPTICS & ELECTRONICS - CHINESE ACAD OF SCI
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