Circuit board construction embedded with semi-conductor chip and preparation thereof

Abstract

A circuit board buried in a semiconductor chip and a fabrication method thereof are disclosed, mainly aiming at providing a semiconductor wafer which has an active face. The active face is provided with a plurality of electrode pads on which a connecting metal layer is formed; a protective layer is developed on the surface of the connecting metal layer and on the surface of the semiconductor wafer; and a plurality of semiconductor chips are formed through cutting process. A carrier plate provided with at least one opening is provided so as to connect and arrange the semiconductor chips in the opening; a dialectic layer and a circuitry layer are sequentially developed on the protective layer on the surfaces of the semiconductor chips and on the carrier plate; and the circuitry layer is electrically connected to the connecting metal layer of the semiconductor chips. Therefore, the invention can protect the connecting metal layer covered by the protective layer arranged on the surfaces of the semiconductor chips from oxidation and contamination and has the advantage that the invention can simplify technique and reduce cost and short processing time.

Description

technical field [0001] The invention relates to a structure of a circuit board embedded with a semiconductor chip and a manufacturing method thereof, in particular to a structure of embedding a semiconductor chip into a circuit board and a manufacturing method thereof. Background technique [0002] In order to meet the market demand, the semiconductor packaging structure strives to be light, thin and short, and the chip is also developing towards small size and high integration (Integration). In view of this, the circuit board as the chip carrier (Chip carrier) is preferably equipped with high-density electrical connection pads. So that the semiconductor chip carried on the circuit board can form a good and complete electrical connection with the circuit board, so that the highly integrated semiconductor chip can operate freely and fully exert its functions and characteristics. Therefore, the ball grid array (BGA) structure, flip chip (Flip Chip) structure, chip size package...

AI Technical Summary

Problems solved by technology

[0004] Although the above-mentioned prior art can form a connection metal layer on the surface of the electrode pad to avoid oxidation of the electrode pad, and can avoid contamination of the electrode pad on the surface of the semiconductor chip during the subsequent semiconductor chip packaging process, the connection metal layer is usually Formed by electroplating of copper (Cu) material, if exposed to the air, it will cause the surface oxidation of the connecting metal layer and cause electrical quality problems

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