Method for chip internal link list supporting policy routing
A technology of internal connection and connection table, which is applied in the direction of data exchange through path configuration, digital transmission system, electrical components, etc., to achieve the effect of improving high-speed processing capability, ensuring network security, and improving performance
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[0029] The specific implementation of the present invention will be further described below in conjunction with accompanying drawing:
[0030] The present invention proposes a method for supporting strategic routing through a chip internal connection table, the method is based on a firewall of FPGA (Field Programmable Gate Array, Field Programmable Gate Array) / ASIC (Application Specific Integrated Circuit, Application Specific Integrated Circuit) chip architecture, To overcome the performance limitations of CPU (Central Processing Unit, central processing unit) and PCI (Peripheral Controller Interface, peripheral controller interface) bus bandwidth on network security equipment, achieve a breakthrough in the performance of network security equipment and reduce the cost of network security solutions. cost and reduce networking costs.
[0031] refer to figure 1 , representing the operation flowchart of the method for supporting policy routing in the chip internal connection tab...
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