Making method for semiconductor encapsulation component and semiconductor part location structure and method
A positioning method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as insufficient filling of glue, slow dispensing speed, and rising costs.
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no. 1 example
[0066] The preferred embodiment of the semiconductor package manufacturing method proposed by the present invention is shown in FIGS. 5A to 5F. First, as shown in FIGS. 5A and 5B, wherein FIG. 5B is a top view corresponding to FIG. (Build-Up) substrate 30 and carrier 36, the length and width of the substrate 30 can be slightly larger or smaller than the predetermined length and width of the semiconductor package, the carrier 36 has an opening 360, and the length and width of the opening 360 larger than the length and width of the substrate 30 for the substrate 30 carrying the chip 31 to be accommodated in the corresponding opening 360 . The material of the carrier 36 can be an organic insulating material such as FR4, FR5, BT or the like.
[0067] Moreover, at least one storage hole 361 is formed on the periphery of the opening 360 of the carrier 36 . In this figure, storage holes 361 are formed at four corners of the opening 360 of the carrier.
[0068] To accommodate the sub...
no. 2 example
[0080] In addition to selecting organic insulating materials such as FR4, FR5, BT, etc., the carrier of the present invention can also use metal materials coated with a metal coating on the surface. The metal coating is a coating material that is not easy to adhere to the packaging colloid. Its embodiment is shown in Figure 6A As shown in 6D, the content of this embodiment is substantially the same as that of the aforementioned first embodiment, and the main difference is only in the selection of materials for the carrier and some steps of the manufacturing method.
[0081]As shown in FIG. 6A, a build-up substrate 40 and a carrier 46 carrying a chip 41 are prepared, the carrier 46 has an opening 460, and the length and width of the opening 460 are larger than the size of the substrate 46, wherein the carrier 46 A metal material such as copper (Cu) is selected, and the surface of the carrier 46 is pre-plated with a metal coating such as gold (Au), nickel (Ni), chromium (Cr), etc...
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