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Single-chip microcomputer

a single-chip microcomputer and chip technology, applied in the field of single-chip microcomputers, to achieve the effect of multiple functions and high performan

Inactive Publication Date: 2012-01-26
KAWASAKI SHUMPEI +8
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0005]An object of the present invention is to provide a single-chip microcomputer which can realize a high performance and multiple functions.
[0006]Another object of the present invention is to provide a single-chip microcomputer which can realize a high operation speed and a low power dissipation.

Problems solved by technology

If, however, a number of peripheral circuits are simply packaged for the higher performance and more functions, it has been found that disadvantages are caused from the standpoint of the operation speed or the power dissipation.

Method used

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Examples

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Embodiment Construction

[0086]FIG. 1 is a block diagram showing one embodiment of a single-chip microcomputer or microprocessor MCU according to the present invention. The individual circuit blocks of FIG. 1 are formed over a single substrate of single-crystalline silicon by the well-known CMOS (i.e., Complementary MOS) semiconductor integrated circuit manufacturing technology.

[0087]The single-chip microcomputer MCU in this embodiment is so directed toward the new generation, although not especially limitative thereto, as to realize high-performance arithmetic operations thereby to integrate the peripheral devices necessary for the system construction by a RISC (i.e., Reduced Instruction Set Computer) type central processing unit CPU and to realize a low power dissipation indispensable for applications to portable devices.

[0088]The central processing unit CPU has a set of the RISC type instructions and can improve the instruction executing speed drastically because a fundamental instruction is subjected to...

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Abstract

A single-chip microcomputer comprising: a first bus having a central processing unit and a cache memory connected therewith; a second bus having a dynamic memory access control circuit and an external bus interface connected therewith; a break controller for connecting the first bus and the second bus selectively; a third bus having a peripheral module connected therewith and having a lower-speed bus cycle than the bus cycles of the first and second buses; and a bus state controller for effecting a data transfer and a synchronization between the second bus and the third bus. The single-chip microcomputer has the three divided internal buses to reduce the load capacity upon the signal transmission paths so that the signal transmission can be accomplished at a high speed. Moreover, the peripheral module required to have no operation speed is isolated so that the power dissipation can be reduced.

Description

BACKGROUND OF THE INVENTION[0001]The present invention relates to a single-chip microcomputer and, more particularly, to a technique which is effective when applied to a high-performance and high-function single-chip microcomputer suited for a home game machine or a portable data communication terminal device.[0002]There is a single-chip microcomputer or a single-chip data processor in which a central processing unit, a dynamic memory access controller, (as will be shortly referred to as the “DMAC”) and a peripheral circuit such as a variety of timers are constructed into a semiconductor integrated circuit device.[0003]An example of this single-chip microcomputer is disclosed in “HITACHI Single-Chip RISC Microcomputer SH7032, SH7034 HARDWARE MANUAL” issued by Hitachi Ltd., in March, 1993.[0004]Thanks to development of the semiconductor technology, a number of semiconductor elements can be formed over one semiconductor substrate. As a result, around the central processing unit, there...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F13/36G11C11/34G06F13/28G06F9/30G06F9/302G06F9/38G06F12/00G06F12/08G06F13/40G06F15/78H04L12/28
CPCG06F9/3001G06F12/0893G06F13/36G06F13/405G06F15/7846Y02B60/1235H04W88/02H04W52/0216Y02B60/1225Y02B60/1228H04W28/08G06F15/7817Y02D10/00Y02D30/70G06F9/00
Inventor KAWASAKI, SHUMPEIAKAO, YASUSHINOGUCHI, KOUKIHASEGAWA, ATSUSHIOHSUGA, HIROSHIKURAKAZU, KEIICHIMATSUBARA, KIYOSHIHAYAKAWA, AKIOITO, YOSHITAKA
Owner KAWASAKI SHUMPEI
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