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High Capacity Low Cost Multi-State Magnetic Memory

Inactive Publication Date: 2008-10-09
AVALANCHE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0016]Briefly, an embodiment of the present invention includes multi-state current-switching magnetic memory element including a stack of two or more magnetic tunneling junctions (MTJs), each MTJ having a free layer and being separated f

Problems solved by technology

Though widely used and commonly accepted, such media suffer from a variety of deficiencies, such as access latency, higher power dissipation, large physical size and inability to withstand any physical shock.
Other dominant storage devices are dynamic random access memory (DRAM) and static RAM (SRAM), which are volatile and very costly but have fast random read / write access time.
Although NAND-based Flash memory is more costly than HDD's, it has replaced magnetic hard drives in many applications such as digital cameras, MP3-players, cell phones, and hand held multimedia devices due, at least in part, to its characteristic of being able to retain data even when power is disconnected.
However, as memory dimension requirements are dictating decreased sizes, scalability is becoming an issue because the designs of NAND-based Flash memory and DRAM memory are becoming difficult to scale with smaller dimensions.
For example, NAND-based Flash memory has issues related to capacitive coupling, few electrons / bit, poor error-rate performance and reduced reliability due to decreased read-write endurance.
It is believed that NAND Flash, especially multi-bit designs thereof, would be extremely difficult to scale below 45 nanometers.
Likewise, DRAM has issues related to scaling of the trench capacitors leading to very complex designs that are becoming increasingly difficult to manufacture, leading to higher cost.
Design of different memory technology in a product adds to design complexity, time to market and increased costs.
For example, in hand-held multi-media applications incorporating various memory technologies, such as NAND Flash, DRAM and EEPROM / NOR Flash memory, complexity of design is increased as are manufacturing costs and time to market.
Another disadvantage is the increase in size of a device that incorporates all of these types of memories therein.
One of the problems with prior art memory structures is that the current and power requirements are too high to make a functional memory device or cell.
This also poses a key concern regarding the reliability of such devices due to likely dielectric breakdown of the tunneling barrier layer and thereby making it non-functional.
The challenge with other prior art techniques has been that the switching current is too high to allow the making of a functional device for memory applications due to the memory's high power consumption.
An additionally known problem is using magnetic memory to store more than two states therein.

Method used

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  • High Capacity Low Cost Multi-State Magnetic Memory
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Examples

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Embodiment Construction

[0035]In the following description of the embodiments, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration of the specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized, because structural changes may be made without departing from the scope of the present invention.

[0036]In an embodiment of the present invention, a multi-state magnetic memory cell is disclosed. A stack of magnetic tunnel junctions (MTJs) are formed, with each MTJ of the stack formed of a fixed layer, a barrier layer, and a free layer. The fixed layer's magnetic polarity is static, or “fixed,” by an adjacent “pinning layer;” while the free layer's magnetic polarity can be switched between two states by passing an electrical current through the MTJ. Depending on the magnetic polarity, or state, of the free layer relative to the fixed layer, the MTJ is either in a ‘0’ or a ‘1’ state.

[00...

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Abstract

One embodiment of the present invention includes multi-state current-switching magnetic memory element including a stack of two or more magnetic tunneling junctions (MTJs), each MTJ having a free layer and being separated from other MTJs in the stack by a seeding layer formed upon an isolation layer, the stack for storing more than one bit of information, wherein different levels of current applied to the memory element causes switching to different states.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation-in-part of U.S. patent application Ser. No. 11 / 678,515, entitled “A High Capacity Low Cost Multi-State Magnetic Memory,” filed Feb. 23, 2007, which was a continuation-in-part of U.S. patent application Ser. No. 11 / 674,124, entitled “Non-Uniform Switching Based on Non-Volatile Magnetic Base Memory,” filed Feb. 12, 2007, and is a continuation-in-part of U.S. patent application Ser. No. 11 / 860,467, entitled, “A Low Cost Multi-State Magnetic Memory”, filed Sep. 24, 2007, which is a continuation-in-part of U.S. patent application Ser. No. 11 / 678,515, entitled “A High Capacity Low Cost Multi-State Magnetic Memory,” filed Feb. 23, 2007, the disclosures of which are incorporated herein by reference, as though set forth in full.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates generally to non-volatile magnetic memory and particular to multi-state magnetic memory.[0004]...

Claims

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Application Information

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IPC IPC(8): H01L29/82
CPCG11C11/5607H01L27/222G11C11/161G11C11/1675G11C11/1673H10N50/10G11C13/0004H10B61/00H10B61/22H10N50/80H10N50/85
Inventor RANJAN, RAJIV YADAVKESHTBOD, PARVIZMALMHALL, ROGER KLAS
Owner AVALANCHE TECH
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