Three dimensional thin film transistor nanocrystal memory element and producing method thereof
A technology for memory elements and thin film transistors, which is applied in the manufacture of semiconductor/solid-state devices, electric solid-state devices, semiconductor devices, etc., can solve the problems of difficult process, high deposition temperature, and low density of a single layer of three-dimensional memory, etc. The effect of process temperature
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[0032] The structure, manufacturing method and operation method of the three-dimensional stacked thin film transistor nano-grain memory element of the present invention will be described in detail below with reference to the accompanying drawings.
[0033] 2A to FIG. 2G are diagrams illustrating the fabrication method of the three-dimensional stacked TFT-type nano-grain memory device of the present invention.
[0034]As shown in Figure 2A, at first, a first doped polysilicon layer is grown on the silicon substrate, and the bit line patterns 111 and 112 are defined by methods such as coating photoresist, exposure and etching in the prior art, and then the bit line patterns 111 and 112 are defined. An oxide layer 113 is filled between the lines, and then planarized by a suitable method such as chemical mechanical polishing (CMP).
[0035] Furthermore, as shown in FIG. 2B, on the bit lines 111, 112 and the oxide layer 113, a second doped polysilicon layer 200 with opposite polari...
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