Structure of channel shielded Rom memory unit and producing method thereof

Abstract

In the method, a shallow ditch is formed on surface of a silicon base material and to implant simultaneously buried ion and anti-punch through dopand in the silicon base material and array region of internal memory storage unit. The buried ion doping region is defined and multiditch is formed at array region of the storage unit. Then, a gate-oxide and a patternized polysilicon grid are formed at the silicon base material and furthermore multitransistor can be formed at peripheral circuit region of the silicon base material.

Description

【Technical field】 [0001] The present invention relates to the structure of a semiconductor component and its manufacturing method, in particular to a shielded read-only memory (mask read-only memory, Mask ROM) in which multiple trenches are formed in the memory storage unit array area of ​​a silicon substrate with its method of manufacture. 【Background technique】 [0002] The basic structure of the shielded ROM is that a plurality of word lines and bit lines are arranged in an interlaced manner, and each word line and each bit line are parallel and electrically insulated from each other, and one word line and one bit line are mutually parallel and electrically insulated. The gate and the surrounding space formed by the intersection of the lines form the storage unit of the shielded read-only memory, and whether any storage unit is turned on or not is determined by the adjustment of the initial voltage of the storage unit in the encoding program. Decision, to achieve the pur...

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Problems solved by technology

[0003] The manufacturing process of general shielded read-only memory is basically made by three main steps of deposition (deposition), lithography (photo) and etching (etching) through multiple cycles. The requirements for integration are getting higher and higher, and the design specifications are getting smaller, so that the size of the components is getting smaller and smaller, and the area of ​​ion implantation is also shrinking. In the subsequent thermal process, it is very easy to cause doping The punch through caused by the lateral diffusion of ions makes it impossible to improve the electrical quality of the components, and the product qualification rate decreases.

[0004] On the other hand, although the size of the device is reduced, the width of the depletion layer caused by the uneven distribution of ions between adjacent bit lines cannot be reduced due to the reduction of the device size. , an unresolved problem

[0005] In the traditional method of manufacturing high-density shielded read-only memory, the area of ​​the memory cell is reduced and the distance between two adjacent bit lines is reduced in the face of higher and higher integration of components, which makes the lateral diffusion of impurities and ions The problem of depleted areas caused by uneven distribution is more significant, which will make it difficult to manufacture smaller shielded ROMs, and reduce the yield and electrical quality of components

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