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Overlay measurement method and manufacturing method of semiconductor device

A technology of measurement and overlay marking, which is applied in semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., to solve the problem of overlay measurement and reduce the cost of photomasks

Pending Publication Date: 2022-01-28
YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The purpose of the present invention is to provide an overlay measurement method and a photolithography method to solve the problem of cross-layer overlay measurement

Method used

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  • Overlay measurement method and manufacturing method of semiconductor device
  • Overlay measurement method and manufacturing method of semiconductor device
  • Overlay measurement method and manufacturing method of semiconductor device

Examples

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Embodiment 1

[0051] The present embodiment provides an overlay measurement method and a manufacturing method of a semiconductor device. image 3 It is a flow chart of an overlay measuring method provided in this embodiment. like image 3 As shown, the overlay measurement method provided in this embodiment includes:

[0052] S01: using a photomask to form a plurality of first marks arranged in an array on the wafer in the first layer photolithography process;

[0053] S02: Using the photomask to form a plurality of second marks arranged in an array on the wafer in the second layer photolithography process; and the first marks and the corresponding second marks are nested;

[0054] S03: Obtain the deviation value of the first mark and the second mark nested with each other, so as to obtain the alignment deviation of the first layer and the second layer.

[0055] Figure 4 , Figure 5A and Figure 5B Schematic diagram of the structure of the photomask used in the overlay measurement met...

Embodiment 2

[0069] This embodiment provides an overlay measurement method. The difference from Embodiment 1 is that the first overlay mark and the second overlay mark on the mask in this embodiment are arranged symmetrically up and down with respect to the unit array pattern. In the two adjacent cell arrays formed on the wafer, the first mark on the first layer and the second mark on the second layer are nested one above the other.

[0070] Figure 9 Schematic diagram of the structure of the photomask used in the overlay measurement method provided for this implementation, Figure 10 Schematic diagrams of the structure of overlay measurement marks on the wafer after the first layer photolithography process and the second layer photolithography process in the overlay measurement method provided for this implementation. Specifically, refer to Figure 9 and Figure 10 As shown, first, a photomask 100 is provided, and the photomask 100 includes a cell array pattern 110' and an overlay mark...

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Abstract

The invention provides an overlay measurement method and a manufacturing method of a semiconductor device, and the method comprises the steps: employing the same photomask, forming a plurality of first marks which are arranged in an array on a wafer in a first-layer photoetching technology, forming a plurality of second marks which are arranged in an array on the wafer in a second-layer photoetching technology, mutually nesting the first marks and the corresponding second marks, and obtaining the alignment deviation of the first layer and the second layer by obtaining the deviation value of the first marks and the second marks which are mutually nested. According to the method, aiming at the etching processes of the first layer and the second layer with the same structure, the same photomask is adopted, the first marks and the second marks are sequentially formed on the wafer through the etching processes of the first layer and the second layer respectively, and the alignment measurement of the first layer and the second layer is realized through the mutual nesting of the first marks and the second marks; the problem of cross-layer overlay measurement is solved, the same photomask is used for cross-layer photoetching, and the cost of the photomask is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an overlay measurement method and a manufacturing method of a semiconductor device. Background technique [0002] Photolithography is the process of transferring the mask pattern on the mask to the wafer through a series of steps such as alignment and exposure. In the manufacturing process of semiconductor chips, the entire manufacturing process can only be completed through a multi-layer photolithography process. With the development of semiconductor manufacturing technology and the development of integrated circuit design and manufacturing, photolithographic imaging technology has developed accordingly, and the feature size of semiconductor devices has also been continuously reduced. In order to achieve good product performance and high yield, how to control the positional alignment of the current layer photolithographic pattern (pattern on the wafer) and the front layer...

Claims

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Application Information

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IPC IPC(8): G03F7/20H01L23/544
CPCG03F7/70633H01L23/544H01L2223/54426Y02P70/50
Inventor 王海平陈营
Owner YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD
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