Performance optimization method for floating point SIMD context switching

An optimization method and context technology, applied in the field of processor data processing, can solve problems such as high system performance overhead, and achieve the effect of small kernel changes and reduced switching overhead

Active Publication Date: 2021-02-23
JIANGNAN INST OF COMPUTING TECH
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  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to provide a performance optimization method for floating-point SIMD context switching to solve the problem of excessive system performance overhead caused by retaining and restoring floating-point SIMD registers during each process switch in the prior art

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  • Performance optimization method for floating point SIMD context switching

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Embodiment

[0023]EXAMPLES: A performance optimization method of floating-point SIMD context switching, based on nuclear processor architecture, including the following steps:

[0024]S1, add a CPU identification field in the process descriptor structure, save the floating point SIMD status of each process recently loaded, whenever the process switches to another CPU, the CPU identification field is updated to the target CPU number;

[0025]S2, create a global array, array length is the number of CPUs in the current system, each of the arrays, saving each CPU's floating point SIMD register recently loaded process number, record the CPU Recent Floating point SIMD register status address for load specific processes;

[0026]S31, set a process marker forEign_fpState, this process flag indicates whether the process of the latest floating point SIMD status corresponds to the currently running CPU, and sets the latest floating point SIMD status that represents the current process is not currently running on t...

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Abstract

The invention discloses a performance optimization method for floating point SIMD context switching, which comprises the following steps: adding a CPU identification field in a process descriptor structure, and creating a global array; when the process is switched, matching the CPU number loaded recently in the floating point SIMD state of the selected process with the target CPU number, matchingthe process number loaded recently in the floating point SIMD register of the target CPU with the selected process number, if the process number and the selected process number are equal, not recovering the floating point SIMD state of the process by the target CPU, and clearing a process flag bit FOREIGNFPSTATE flag of the process; and if not, the target CPU recovers the floating point SIMD stateof the process, and a process flag bit FOREIGNFPSTATE flag of the process is set at the moment. According to the method, the kernel process switching expenditure is reduced, the kernel is slightly changed, and the method is suitable for the retention and recovery processes of other system registers, such as a performance counter and the like.

Description

Technical field[0001]The present invention belongs to the technical field of processor data processing, and more particularly to a performance optimization method of floating point SIMD context.Background technique[0002]Typical nuclear processors In order to improve data parallel processing performance, the basic instruction system is typically extended, design dedicated SIMD vector instructions and introduces special vector registers, and vector registers are usually shared with floating point registers to form vector features. Floating point SIMD processing technology. The process is the basic concept in all modern operating system kernels, which acts as a basic entity assigned by system resources (CPU / memory, etc.). Each process has the process context information that describes the process of executive activity, including computer system and execution of this process. Various registers, such as general registers, program counters, floating point SIMD registers, and the like.[0...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/30G06F9/38
CPCG06F9/30123G06F9/3013G06F9/3887Y02D10/00
Inventor 林海南王星焱黄高阳郑岩刘松邹通
Owner JIANGNAN INST OF COMPUTING TECH
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